Energy-efficient multiprocessor systems-on-chip for embedded computing: Exploring programming models and their architectural support

IEEE Transactions on Computers

Volumn 56, Issue 5, 2007, Pages 606-621

  Poletti, Francesco ^a   Poggiali, Antonio ^b   Bertozzi, Davide ^c   Benini, Luca ^a   Marchal, Pol ^d   Loghi, Mirko ^e   Poncino, Massimo ^e  

^a UNIVERSITY OF BOLOGNA   (Italy)

^b STMICROELECTRONICS   (Italy)

^c UNIVERSITY OF FERRARA   (Italy)

^d Katholieke Universiteit Leuven   (Belgium)

^e POLITECNICO DI TORINO   (Italy)

Author keywords

Embedded multimedia; Energy efficiency; Low power; MPSoCs; Programming models; Task level parallelism

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER PROGRAMMING; COMPUTER SIMULATION; ENERGY EFFICIENCY; PROGRAM PROCESSORS;

EMBEDDED COMPUTING; MULTIPROCESSOR SYSTEMS-ON-CHIP; PROGRAMMING MODELS; TASK-LEVEL PARALLELISM;

MICROPROCESSOR CHIPS;

EID: 34147141277     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2007.1040     Document Type: Article

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