A low power high speed accumulator for DDFS applications

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Chappell, Michael ^a   McEwan, Alistair ^b  

^a UNIVERSITY OF OXFORD   (United Kingdom)

^b UNIVERSITY COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; NONLINEAR SYSTEMS; ROM; SIMULATORS;

DIRECT DIGITAL FREQUENCY SYNTHESIS (DFSS); POWER CONSUMPTION; REDUNDANT CIRCUITARY; SPURIOUS FREE DYNAMICC RANGE (SFDR);

FLIP FLOP CIRCUITS;

EID: 4344680643     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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