메뉴 건너뛰기




Volumn 47, Issue 3, 2004, Pages 397-404

Teaching asynchronous design in digital integrated circuits

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; CURRICULA; DIGITAL ARITHMETIC; DIGITAL INTEGRATED CIRCUITS; ELECTRICAL ENGINEERING; LOGIC DESIGN; LOGIC GATES; MULTIPLYING CIRCUITS; TEACHING;

EID: 4344616097     PISSN: 00189359     EISSN: None     Source Type: Journal    
DOI: 10.1109/TE.2004.825923     Document Type: Article
Times cited : (11)

References (11)
  • 5
    • 0029191713 scopus 로고
    • Asynchronous design methodologies: An overview
    • Jan
    • S. Hauck, "Asynchronous design methodologies: An overview," Proc. IEEE, vol. 83, pp. 69-93, Jan. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 69-93
    • Hauck, S.1
  • 7
    • 0036679763 scopus 로고    scopus 로고
    • Computers without clocks
    • Aug
    • I. E. Sutherland and J. Ebergen, "Computers without clocks," Sci. Amer., pp. 62-69, Aug. 2002.
    • (2002) Sci. Amer. , pp. 62-69
    • Sutherland, I.E.1    Ebergen, J.2
  • 8
    • 0028581627 scopus 로고
    • The design of fast asynchronous adder structures and their implementation using DCVS logic
    • M. Renaudin and B. El Hassan, "The design of fast asynchronous adder structures and their implementation using DCVS logic," in 1994 IEEE Int. Symp. Circuits Systems, 1994, pp. 291-294.
    • (1994) 1994 IEEE Int. Symp. Circuits Systems , pp. 291-294
    • Renaudin, M.1    El Hassan, B.2
  • 10
    • 0026882866 scopus 로고
    • Beware the isochronic fork
    • June
    • K. van Berkel, "Beware the isochronic fork," Integr. VLSI J., vol. 13, no. 2, pp. 103-128, June 1992.
    • (1992) Integr. VLSI J. , vol.13 , Issue.2 , pp. 103-128
    • van Berkel, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.