A novel analog layout synthesys tool

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2004, Pages

  Zhang, Lihong ^a   Kleine, Ulrich ^a  

^a OTTO VON GUERICKE UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; CONSTRAINT THEORY; ELECTRIC NETWORK TOPOLOGY; ELECTROMIGRATION; INTEGRATED CIRCUIT LAYOUT; ITERATIVE METHODS; MATHEMATICAL MODELS; MOSFET DEVICES; OPTIMIZATION; TREES (MATHEMATICS);

ALADIN INSTRUMENT; ANALOG CIRCUITS; GLOBAL ROUTING; SIMULATED ANNEALING (SA);

INTEGRATED CIRCUITS;

EID: 4344583004     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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