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Volumn 2, Issue , 2000, Pages 988-992

A new design rule description for automated layout tools

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG LAYOUT; AUTOMATED LAYOUT; COMPLEX DESIGNS; DESIGN EFFICIENCY; DESIGN ENVIRONMENT; GRAPHICAL INTERFACE; NEW DESIGN; NOVEL DESIGN; TECHNOLOGY INDEPENDENT;

EID: 0010568159     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2000.913042     Document Type: Conference Paper
Times cited : (6)

References (11)
  • 2
  • 3
    • 84893749867 scopus 로고    scopus 로고
    • Automatic topology optmization for analog module generators
    • March
    • M. Wolf and U. Kleine, "Automatic Topology Optmization for Analog Module Generators", Proc. The European Design & Test Conference, pp. 961-962, March 1998.
    • (1998) Proc. the European Design & Test Conference , pp. 961-962
    • Wolf, M.1    Kleine, U.2
  • 4
    • 0032218628 scopus 로고    scopus 로고
    • A novel design assistant for analog circuits
    • Feb
    • M. Wolf and U. Kleine, "A Novel Design Assistant for Analog Circuits", Proc. ASP-DAC, pp. 495-500, Feb. 98.
    • Proc. ASP-DAC , vol.98 , pp. 495-500
    • Wolf, M.1    Kleine, U.2
  • 5
    • 0031623466 scopus 로고    scopus 로고
    • New description language and graphical user interface for module generation in analog layouts
    • June
    • M. Wolf, U. Kleine and J. Schulze, "New Description Language and Graphical User Interface for Module Generation in Analog Layouts", Proc. ISCAS, Vol.VI, pp. 290-293, June 1998.
    • (1998) Proc. ISCAS , vol.6 , pp. 290-293
    • Wolf, M.1    Kleine, U.2    Schulze, J.3
  • 6
    • 0032629282 scopus 로고    scopus 로고
    • Reliability driven module generation for analog layouts
    • May-June
    • M. Wolf and U. Kleine, "Reliability Driven Module Generation for Analog Layouts", Proc. ISCAS, Vol.VI, pp.412-415, May-June 1999.
    • (1999) Proc. ISCAS , vol.6 , pp. 412-415
    • Wolf, M.1    Kleine, U.2
  • 7
    • 0024647840 scopus 로고
    • ILAC: An automated layout tool for analog CMOS circuits
    • April
    • J. Rijmenants, et al, "ILAC: An Automated Layout Tool for Analog CMOS Circuits", IEEE J. SolidState Circuits, Vol.24, No.2, pp. 417-425, April 1989.
    • (1989) IEEE J. SolidState Circuits , vol.24 , Issue.2 , pp. 417-425
    • Rijmenants, J.1
  • 8
    • 0025383839 scopus 로고
    • OPASYN: A compiler for cmos operational amplifiers
    • Feb
    • H.Y. Koh, et al, "OPASYN: A Compiler for CMOS Operational Amplifiers", IEEE Trans. Computer-Aided Design, Vol.9, No.2, pp. 113-125, Feb. 1990.
    • (1990) IEEE Trans. Computer-Aided Design , vol.9 , Issue.2 , pp. 113-125
    • Koh, H.Y.1
  • 9
    • 0026118974 scopus 로고
    • KOAN/ANAGRAM II: New tools for device-level analog placement and routing
    • March
    • J.M. Cohn, et al, "KOAN/ANAGRAM II: New Tools for Device-Level Analog Placement and Routing", IEEE J. Solid-State Circuits, Vol.26, pp. 330-342, March 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 330-342
    • Cohn, J.M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.