A five-stage pipeline, 204 cycles/MB, single-port SRAM-based deblocking filter for H.264/AVC

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 18, Issue 3, 2008, Pages 363-374

  Xu, Ke ^a,b   Choy, Chiu Sing ^a,b  

^a IEEE

^b CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

Deblocking filter; H.264 AVC; Hazard; Macroblock; Pipeline; SRAM; Throughput

Indexed keywords

DEBLOCKING FILTERS; EDGE FILTERING; MACROBLOCK;

DATA STRUCTURES; EDGE DETECTION; PIPELINE PROCESSING SYSTEMS; STATIC RANDOM ACCESS STORAGE; THROUGHPUT;

DIGITAL FILTERS;

EID: 41649111360     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSVT.2008.918437     Document Type: Article

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