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Volumn 2006, Issue , 2006, Pages 381-385

An efficient hardware architecture for H.264 adaptive deblocking filter algorithm

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE FILTERING; ALGORITHMS; BLOCK CODES; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE CODING; REAL TIME SYSTEMS;

EID: 33845594488     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AHS.2006.20     Document Type: Conference Paper
Times cited : (10)

References (8)
  • 3
    • 77953481848 scopus 로고    scopus 로고
    • Draft ITU-T recommendation and final draft international standard of joint video specification
    • Joint Video Team (JVT) of ITU-T VCEG and ISO/IEC MPEG, May
    • Joint Video Team (JVT) of ITU-T VCEG and ISO/IEC MPEG, Draft ITU-T Recommendation and Final Draft International Standard of Joint Video Specification, ITU-T Rec. H.264 and ISO/IEC 14496-10 AVC, May 2003
    • (2003) ITU-T Rec. H.264 and ISO/IEC 14496-10 AVC
  • 7
  • 8
    • 84863698491 scopus 로고    scopus 로고
    • A high performance and low cost hardware architecture for H.264 transform and quantization algorithms
    • September
    • Ozgur Tasdizen and Ilker Hamzaoglu, "A High Performance and Low Cost Hardware Architecture for H.264 Transform and Quantization Algorithms", Proc. European Signal Processing Conference, September 2005
    • (2005) Proc. European Signal Processing Conference
    • Tasdizen, O.1    Hamzaoglu, I.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.