55nm CMOS technology for low standby power/generic applications deploying the combination of gate work function control by HfSiON and stress-induced mobility enhancement

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2006, Pages 158-159

  Nakamura, H ^b   Nakahara, Y ^a   Kimizuka, N ^a   Abe, T ^a   Yamamoto, I ^a   Fukase, T ^a   Nakayama, T ^a   Taniguchi, K ^a   Masuzaki, K ^b   Uejima, K ^b   Iwamoto, T ^b   Tatsumi, T ^b   Imai, K ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

^b NEC CORPORATION   (Japan)

Author keywords

55nm; ArF immersion; Gate work function control; Hf; High k; LSTP; Process induced stress and GIDL

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; GATE DIELECTRICS; HAFNIUM COMPOUNDS; HOLE MOBILITY; LITHOGRAPHY; STRESS ANALYSIS;

DRIVE CURRENTS; MOBILITY ENHANCEMENT;

WORK FUNCTION;

EID: 41149150823     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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