High-performance twin silicon nanowire MOSFET (TSNWFET) on bulk Si wafer

IEEE Transactions on Nanotechnology

Volumn 7, Issue 2, 2008, Pages 181-184

  Suk, Sung Dae ^a   Yeo, Kyoung Hwan ^a   Cho, Keun Hwi ^a   Li, Ming ^a   Yeoh, Yun Young ^a   Lee, Sung Young ^a   Kim, Sung Min ^a   Yoon, Eun Jung ^a   Kim, Min Sang ^a   Oh, Chang Woo ^a   Kim, Sung Hwan ^a   Kim, Dong Won ^a   Park, Donggun ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

5 nm; Bulk MOSFET; Gate all around (GAA); High performance; MOSFET; Nanowire; TSNWFET; Twin silicon nanowire

Indexed keywords

GATES (TRANSISTOR); NANOWIRES; SILICON; SILICON WAFERS;

GATE ALL AROUND (GAA); NANOWIRE CHANNELS; PARASITIC TRANSISTORS;

MOSFET DEVICES;

EID: 41149084929     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2008.917843     Document Type: Conference Paper

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