-
1
-
-
0031472340
-
Networks of spiking neurons: The third generation of neural network models
-
W. Maass. "Networks of spiking neurons: The third generation of neural network models," Neural Networks. Vol. 10, no. 9, pp 1659-1671. 1997.
-
(1997)
Neural Networks
, vol.10
, Issue.9
, pp. 1659-1671
-
-
Maass, W.1
-
3
-
-
85156206478
-
Neuromorphic bistable VLSI synapses with spike-timing-dependent plasticity
-
Cambridge, MA: MIT Press, Dec
-
G. Indiveri, "Neuromorphic bistable VLSI synapses with spike-timing-dependent plasticity." in Advances in Neural Information Processing Systems, vol. 15, Cambridge, MA: MIT Press, Dec. 2002.
-
(2002)
Advances in Neural Information Processing Systems
, vol.15
-
-
Indiveri, G.1
-
4
-
-
0242611588
-
A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with longterm memory
-
Sep
-
E. Chicca, D. Badoni, V. Dante, et al., "A VLSI recurrent network of integrate-and-fire neurons connected by plastic synapses with longterm memory," IEEE Transactions on Neural Networks, vol. 14, no. 5, pp. 1297-1307. Sep. 2003.
-
(2003)
IEEE Transactions on Neural Networks
, vol.14
, Issue.5
, pp. 1297-1307
-
-
Chicca, E.1
Badoni, D.2
Dante, V.3
-
5
-
-
4644246168
-
Synchrony detection and amplification by silicon neurons with STDP synapses
-
Sep
-
A. Bofill-i-Petit and A. F. Murray, "Synchrony detection and amplification by silicon neurons with STDP synapses," IEEE Transactions on Neural Networks, vol. 15, no. 5, pp. 1296-1304, Sep. 2004.
-
(2004)
IEEE Transactions on Neural Networks
, vol.15
, Issue.5
, pp. 1296-1304
-
-
Bofill-i-Petit, A.1
Murray, A.F.2
-
6
-
-
4644262757
-
Temporal coding in a silicon network of integrate-and-fire neurons
-
Sep
-
S. Liu and R. Douglas, "Temporal coding in a silicon network of integrate-and-fire neurons," IEEE Transactions on Neural Networks, vol. 15. no. 5, pp. 1305-1314. Sep. 2004.
-
(2004)
IEEE Transactions on Neural Networks
, vol.15
, Issue.5
, pp. 1305-1314
-
-
Liu, S.1
Douglas, R.2
-
7
-
-
0030285698
-
A single-transistor silicon synapse
-
Nov
-
C. Diorio. P. Hasler, B. A. Minch. and C. A. Mead, "A single-transistor silicon synapse." IEEE Transactions on Electron Devices, vol. 43, no. 11, pp. 1972-1980, Nov. 1996.
-
(1996)
IEEE Transactions on Electron Devices
, vol.43
, Issue.11
, pp. 1972-1980
-
-
Diorio, C.1
Hasler, P.2
Minch, B.A.3
Mead, C.A.4
-
8
-
-
0031340544
-
A floating-gate MOS learning array with locally computed weight updates
-
Dec
-
C. Diorio, P. Hasler, B. A. Minch, and C. A. Mead, "A floating-gate MOS learning array with locally computed weight updates," IEEE Transactions on Electron Devices, vol. 44, no. 12. pp. 2281-2289, Dec. 1997.
-
(1997)
IEEE Transactions on Electron Devices
, vol.44
, Issue.12
, pp. 2281-2289
-
-
Diorio, C.1
Hasler, P.2
Minch, B.A.3
Mead, C.A.4
-
9
-
-
33646891546
-
Adaptive CMOS: From biological inspiration to systems-on-a-chip
-
Mar
-
C. Diorio, D. Hsu. and M. Figueroa. "Adaptive CMOS: from biological inspiration to systems-on-a-chip." Proceedings of the IEEE, vol. 90, no. 3, pp. 345-357, Mar. 2002.
-
(2002)
Proceedings of the IEEE
, vol.90
, Issue.3
, pp. 345-357
-
-
Diorio, C.1
Hsu, D.2
Figueroa, M.3
-
10
-
-
33745910538
-
-
Y. Chen, S. Hall, L. McDaid, O. Buiu, and P. Kelly, A silicon synapse based on a charge transfer device for spiking neural network application, in Lecture Notes in Computer Science, 3973, J. Wang, Eds. Germany: Springer-Verlag, 2006. to be published.
-
Y. Chen, S. Hall, L. McDaid, O. Buiu, and P. Kelly, "A silicon synapse based on a charge transfer device for spiking neural network application," in Lecture Notes in Computer Science, vol. 3973, J. Wang, Eds. Germany: Springer-Verlag, 2006. to be published.
-
-
-
-
11
-
-
0015141554
-
Drift-aiding fringing fields in Charge-Coupled Devices
-
Oct
-
J. E. Carnes, W. F. Kosonocky, and E. G. Ramberg. "Drift-aiding fringing fields in Charge-Coupled Devices," IEEE Journal of Solid-State Circuits. vol. SC-6, no. 5, pp. 322-326, Oct. 1971.
-
(1971)
IEEE Journal of Solid-State Circuits
, vol.SC-6
, Issue.5
, pp. 322-326
-
-
Carnes, J.E.1
Kosonocky, W.F.2
Ramberg, E.G.3
-
12
-
-
0015360452
-
Free charge transfer in Charge-Coupled Devices
-
June
-
J. E. Carnes. W. F. Kosonocky, and E. G. Ramberg. "Free charge transfer in Charge-Coupled Devices," IEEE Transactions on Electron Devices, vol. ED-19, no. 6, pp. 798-808, June 1972.
-
(1972)
IEEE Transactions on Electron Devices
, vol.ED-19
, Issue.6
, pp. 798-808
-
-
Carnes, J.E.1
Kosonocky, W.F.2
Ramberg, E.G.3
-
13
-
-
40649092257
-
The physics of Charge-Coupled Devices
-
M. J. Howes and D. V. Morgan, Eds. Chichester. UK: John Wiley & Sons
-
C. Kim, "The physics of Charge-Coupled Devices," in Charge-coupled Devices and Systems, M. J. Howes and D. V. Morgan, Eds. Chichester. UK: John Wiley & Sons. 1979, pp. 1-80.
-
(1979)
Charge-coupled Devices and Systems
, pp. 1-80
-
-
Kim, C.1
-
14
-
-
0015143028
-
Charge-coupled digital circuits
-
Oct
-
W. F. Kosonocky and J. E. Carnes, "Charge-coupled digital circuits," IEEE Journal of Solid-State Circuits, vol. SC-6, no. 5, pp. 314-322. Oct. 1971.
-
(1971)
IEEE Journal of Solid-State Circuits
, vol.SC-6
, Issue.5
, pp. 314-322
-
-
Kosonocky, W.F.1
Carnes, J.E.2
-
15
-
-
27944492851
-
A functional MOS transistor featuring gatelevel weighted sum and threshold operations
-
June
-
T. Shibata and T. Ohmi, "A functional MOS transistor featuring gatelevel weighted sum and threshold operations," IEEE Transactions on Electron Devices, vol. 39. no. 6, pp. 1444-1455. June 1992.
-
(1992)
IEEE Transactions on Electron Devices
, vol.39
, Issue.6
, pp. 1444-1455
-
-
Shibata, T.1
Ohmi, T.2
-
16
-
-
0022115427
-
Optimum design of dual-control gate cell for high-density EEPROM's
-
Sep
-
K. Hieda, M. Wada, T. Shibata, S. Inoue. M. Momodomi, and H. Iizuka, "Optimum design of dual-control gate cell for high-density EEPROM's." IEEE Transactions on Electron Devices, vol. ED-32, no. 9, pp. 1776-1780, Sep. 1985.
-
(1985)
IEEE Transactions on Electron Devices
, vol.ED-32
, Issue.9
, pp. 1776-1780
-
-
Hieda, K.1
Wada, M.2
Shibata, T.3
Inoue, S.4
Momodomi, M.5
Iizuka, H.6
|