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January
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J. M. Ludden, W. Roesner, G. M. Heiling, J. R. Reysa, J. R. Jackson, B.-L. Chu, M. L. Behm, J. R. Baumgartner, R. D. Peterson, J. Abdulhafiz, W. E. Bucy, J. H. Klaus, D. J. Klema, T. N. Le, F. D. Lewis, P. E. Milling, L. A. McConville, B. S. Nelson, V. Paruthi, T. W. Pouarz, A. D. Romonosky, J. Stuecheli, K. D. Thompson, D. W. Victor, and B. Wile, "Functional Verification of the POWER4 Microprocessor and POWER4 Multiprocessor Systems," IBM J. Res. & Dev. 46, No. 1, 53-76 (January 2002); see http://www.research.ibm.com/journal/rd/461/ludden.pdf.
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Protocol verification as a hardware design aid
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Cambridge, MA, October
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D. L. Dill, A. J. Drexler, A. J. Hu, and C. H. Yang, "Protocol Verification as a Hardware Design Aid," Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors, Cambridge, MA, October 1992, pp. 522-525.
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Formal design of cache memory protocols in IBM
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March
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S. M. German, "Formal Design of Cache Memory Protocols in IBM," Formal Methods Syst. Design 22, No. 2, 133-141 (March 2003); see http://www.kluweronline.com/issn/0925-9856/contents/.
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The role of two-cycle simulation in the S/390 verification process
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July/September
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Gary A. Van Huben, "The Role of Two-Cycle Simulation in the S/390 Verification Process," IBM J. Res. & Dev. 41, No. 4/5, 593-599 (July/September 1997), see http://www.research.ibm.com/journal/rd/414/vanhuben.pdf.
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User defined coverage - a tool supported methodology for design verification
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San Francisco, June see
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R. Grinwald, E. Harel, M. Orgad, S. Ur, and A. Ziv, "User Defined Coverage - A Tool Supported Methodology for Design Verification," Proceedings of the Design Automation Conference (DAC'98), San Francisco, June 1998, pp. 158-163; see http://www.sigda.org/Archives/ProceedingArchives/Dac/Dac98/papers/1998/dac98/pdffiles/09pdf.
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