Formal design of cache memory protocols in IBM

Formal Methods in System Design

Volumn 22, Issue 2, 2003, Pages 133-141

  German, Steven M ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Cache memory protocol; Formal design of hardware; Murphi verifier; Protocol verification

Indexed keywords

CACHE MEMORY; COMPUTER HARDWARE; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SIMULATION; NETWORK PROTOCOLS; SERVERS; SYSTEMS ANALYSIS;

CACHE MEMORY PROTOCOLS; FORMAL DESIGN TECHNIQUES; MURPHI VERIFIER; PROTOCOL VERIFICATION;

COMPUTER ARCHITECTURE;

EID: 0038681988     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1022921522163     Document Type: Article

References (9)

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