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Volumn , Issue , 2006, Pages 956-959

Accurate and fast estimation of junction band-to-band leakage in nanometer-scale MOSFET

Author keywords

Band to band tunneling (BTBT); Doping profile; Estimation; Halo doping; Leakage

Indexed keywords

ESTIMATION; LEAKAGE CURRENTS; MODAL ANALYSIS; NETWORKS (CIRCUITS);

EID: 39749087603     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APCCAS.2006.342220     Document Type: Conference Paper
Times cited : (3)

References (20)
  • 2
    • 0024870701 scopus 로고
    • Drain leakage current characteristics due to the band-to-band tunneling in LDD MOS devices
    • K. Kurimoto, Y. Odake, and S. Odanaka, "Drain leakage current characteristics due to the band-to-band tunneling in LDD MOS devices," in Int. Electron Devices Meeting, 1989, pp. 621-624.
    • (1989) Int. Electron Devices Meeting , pp. 621-624
    • Kurimoto, K.1    Odake, Y.2    Odanaka, S.3
  • 3
    • 0042697357 scopus 로고    scopus 로고
    • Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
    • K. Roy, S. Mukhopadhyay, and H. Mahmoodi-Meimand, "Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits," Proceedings of the IEEE, vol. 91, no. 2, pp. 305-327, 2003.
    • (2003) Proceedings of the IEEE , vol.91 , Issue.2 , pp. 305-327
    • Roy, K.1    Mukhopadhyay, S.2    Mahmoodi-Meimand, H.3
  • 4
    • 0032099759 scopus 로고    scopus 로고
    • On the retention time distribution of dynamic random access memory (DRAM)
    • T. Hamamoto, S. Sugiura, and S. Sawada, "On the retention time distribution of dynamic random access memory (DRAM)," IEEE Trans. on Electron Devices, vol. 45, no. 6, pp. 1300-1309, 1998.
    • (1998) IEEE Trans. on Electron Devices , vol.45 , Issue.6 , pp. 1300-1309
    • Hamamoto, T.1    Sugiura, S.2    Sawada, S.3
  • 6
  • 7
    • 0031621934 scopus 로고    scopus 로고
    • Estimation of standby leakage power in CMOS circuit considering accurate modeling of transistor stacks
    • Z. Chen, M. Johnson, L. Wei, and W. Roy, "Estimation of standby leakage power in CMOS circuit considering accurate modeling of transistor stacks," in Int. Symposium on Low Power Electronics and Design, 1998, pp. 239-244.
    • (1998) Int. Symposium on Low Power Electronics and Design , pp. 239-244
    • Chen, Z.1    Johnson, M.2    Wei, L.3    Roy, W.4
  • 8
    • 50249189234 scopus 로고    scopus 로고
    • Synopsys, Inc
    • Synopsys, Inc., Medici User Guide, 2004.
    • (2004) Medici User Guide
  • 9
    • 0002930518 scopus 로고
    • Theory of tunneling
    • E. O. Kane, "Theory of tunneling," Journal of Applied Physics, vol. 32, no. 1, pp. 83-91, 1961.
    • (1961) Journal of Applied Physics , vol.32 , Issue.1 , pp. 83-91
    • Kane, E.O.1
  • 10
    • 0024122020 scopus 로고
    • Band-to-band tunneling and thermal generation gate-induced drain leakage
    • S. Voldman, J. Brachitta, and D. Fitzgerald, "Band-to-band tunneling and thermal generation gate-induced drain leakage," IEEE Trans. on Electron Devices, vol. 35, no. 12, p. 2433, 1988.
    • (1988) IEEE Trans. on Electron Devices , vol.35 , Issue.12 , pp. 2433
    • Voldman, S.1    Brachitta, J.2    Fitzgerald, D.3
  • 11
    • 0026899519 scopus 로고
    • A quantitative physical model for the band-to-band tunneling-induced substrate hot electron injection in MOS devices
    • I.-C. Chen and C. Teng, "A quantitative physical model for the band-to-band tunneling-induced substrate hot electron injection in MOS devices," IEEE Trans. on Electron Devices, vol. 39, no. 7, pp. 1646-1651, 1992.
    • (1992) IEEE Trans. on Electron Devices , vol.39 , Issue.7 , pp. 1646-1651
    • Chen, I.-C.1    Teng, C.2
  • 12
    • 0032674653 scopus 로고    scopus 로고
    • A new quasi-2-d model for hot-carrier band-to-band tunneling current
    • K.-F. You and C.-Y. Wu, "A new quasi-2-d model for hot-carrier band-to-band tunneling current," IEEE Trans. on Electron Devices, vol. 46, no. 6, pp. 1174-1179, 1999.
    • (1999) IEEE Trans. on Electron Devices , vol.46 , Issue.6 , pp. 1174-1179
    • You, K.-F.1    Wu, C.-Y.2
  • 13
    • 0035397533 scopus 로고    scopus 로고
    • An analytic three-terminal band-to-band tunneling model on GIDL in MOSFET
    • J.-H. Chen, S.-C. Wong, and Y.-H. Wang, "An analytic three-terminal band-to-band tunneling model on GIDL in MOSFET," IEEE Trans. on Electron Devices, vol. 48, no. 7, pp. 1400-1405, 2001.
    • (2001) IEEE Trans. on Electron Devices , vol.48 , Issue.7 , pp. 1400-1405
    • Chen, J.-H.1    Wong, S.-C.2    Wang, Y.-H.3
  • 14
    • 0036474749 scopus 로고    scopus 로고
    • Impact of gate induced drain leakage on overall leakage of submicrometer CMOS VLSI circuits
    • O. Semenov, A. Pradzynski, and M. Sachdev, "Impact of gate induced drain leakage on overall leakage of submicrometer CMOS VLSI circuits," IEEE Trans. on Semiconductor Manufacturing, vol. 15, no. 1, pp. 9-18, 2002.
    • (2002) IEEE Trans. on Semiconductor Manufacturing , vol.15 , Issue.1 , pp. 9-18
    • Semenov, O.1    Pradzynski, A.2    Sachdev, M.3
  • 16
    • 0042090415 scopus 로고    scopus 로고
    • Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling
    • S. Mukhopadhyay, A. Raychowdhury, and K. Roy, "Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling," in Design Automation Conference, 2003, pp. 169-174.
    • (2003) Design Automation Conference , pp. 169-174
    • Mukhopadhyay, S.1    Raychowdhury, A.2    Roy, K.3
  • 17
    • 1542329235 scopus 로고    scopus 로고
    • Modeling and estimation of total leakage current in nano-scaled-CMOS devices considering the effect of parameter variation
    • S. Mukhopadhyay and K. Roy, "Modeling and estimation of total leakage current in nano-scaled-CMOS devices considering the effect of parameter variation," in Int. Symposium on Low Power Electronics and Design, 2003, pp. 172-175.
    • (2003) Int. Symposium on Low Power Electronics and Design , pp. 172-175
    • Mukhopadhyay, S.1    Roy, K.2
  • 18
    • 15244338765 scopus 로고    scopus 로고
    • Accurate estimation of total leakage in nanometer-scale bulk CMOS circuits based on device geometry and doping profile
    • S. Mukhopadhyay, A. Raychowdhury, and K. Roy, "Accurate estimation of total leakage in nanometer-scale bulk CMOS circuits based on device geometry and doping profile," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 3, pp. 363-381, 2005.
    • (2005) IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems , vol.24 , Issue.3 , pp. 363-381
    • Mukhopadhyay, S.1    Raychowdhury, A.2    Roy, K.3
  • 19
    • 50249156798 scopus 로고    scopus 로고
    • Microsystems Tech. Lab., MIT, Cambridge. Well-Tempered Bulk-Si NMOSFET Device Home Page. [Online]. Available: http://www-mtl.mit.edu/ researchgroups/Well/
    • Microsystems Tech. Lab., MIT, Cambridge. "Well-Tempered" Bulk-Si NMOSFET Device Home Page. [Online]. Available: http://www-mtl.mit.edu/ researchgroups/Well/


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.