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Volumn 25, Issue 8, 2004, Pages 532-534
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Effect of capping silicon nitride layer and nitrided gate oxide on hump of transistors
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Author keywords
[No Author keywords available]
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Indexed keywords
CHEMICAL MECHANICAL POLISHING;
CHEMICAL VAPOR DEPOSITION;
CMOS INTEGRATED CIRCUITS;
GATES (TRANSISTOR);
MOISTURE;
OXIDATION;
SEMICONDUCTING SILICON COMPOUNDS;
SEMICONDUCTOR DEVICE MANUFACTURE;
SEMICONDUCTOR GROWTH;
SILICON NITRIDE;
SILICON WAFERS;
THERMAL DIFFUSION;
HIGH VOLTAGE TRANSISTORS;
LOW PRESSURE CHEMICAL VAPOR DEPOSITION;
LOW VOLTAGE TRANSISTORS;
MOISTURE DIFFUSION;
NITRIDED GATE OXIDE;
MOSFET DEVICES;
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EID: 3943104812
PISSN: 07413106
EISSN: None
Source Type: Journal
DOI: 10.1109/LED.2004.832121 Document Type: Article |
Times cited : (7)
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References (7)
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