VLSI design of high-rate quasi-cyclic LDPC codes for magnetic recording channel

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2006, Pages 325-328

  Zhong, Hao ^a   Zhang, Tong ^a   Haratsch, Erich F ^b  

^a RENSSELAER POLYTECHNIC INSTITUTE   (United States)

^b AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DECODING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MAGNETIC RECORDING; SIGNAL PROCESSING;

LDPC DECODERS; MAGNETIC RECORDING CHANNELS;

VLSI CIRCUITS;

EID: 39049131175     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2006.320902     Document Type: Conference Paper

References (9)

1. A. Dholakia, E. Eleftheriou, T. Mittelholzer, and M.P.C. Fossorier, "Capacity-approaching codes: can they be applied to the magnetic recording channel?," IEEE Communications Magazine, vol. 42, pp. 122-130, Feb. 2004.
2. D. Divsalar, S. Dolinar, J. Thorpe, and C. Jones, "Constructing ldpc codes from simple loop-free encoding modules," in Proc. of IEEE International Conference on Communications, May 2005, pp. 658-662.
3. L. Sun, H. Song, B.V.K.V. Kumar, and Z. Keim, "Field-programmable gate-array-based investigation of the error floor of low-density parity check codes for magnetic recording channels," in IEEE Transactions on Magnetics, Oct. 2005, pp. 2083-2085.
4. D. E. Hocevar, "LDPC code construction with flexible hardware implementation," in IEEE International Conference on Communications, 2003, pp. 2708-2712.
5. H. Zhong and T. Zhang, "Block-LDPC: A practical LDPC coding system design approach," IEEE Transactions on Circuits and Systems I, vol. 52, pp. 766-775, April 2005.
6. Z. Li, L. Chen, S. Lin, W. Fong, and P.-S. Yeh, "Efficient encoding of quasi-cyclic low-density parity-check codes," IEEE Transactions on Communications, to appear, 2005.
7. E. W. Weisstein, Box-Muller Transformation, From MathWorldA Wolfram Web Resource. http://mathworld.wolfram.com/Box-MullerTransformation. html.
8. A. J. Viterbi, "An intuitive justification and a simplified implementation of the map decoder for convolutional codes," IEEE Journal on Selected Areas in Communications, vol. 16, pp. 260-264, Feb. 1998.
9. J.K.-S. Lee, B. Lee, J. Thorpe, K. Andrews, S. Dolinar, and J. Hamkins, "A scalable architecture of a structured LDPC decoder," in International Symposium on Information Theory, July 2004, p. 293.