Optimal integer delay-budget assignment on directed acyclic graphs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 8, 2004, Pages 1184-1199

  Bozorgzadeh, Elaheh ^a   Ghiasi, Soheil ^b   Takahashi, Atsushi ^c   Sarrafzadeh, Majid ^b  

^a Irvine   (United States)

^b Engineering IV   (United States)

^c TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

Core based design implementations; Delay budgeting; Integer programming; Timing constraint

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; CONSTRAINT THEORY; FIELD PROGRAMMABLE GATE ARRAYS; GRAPH THEORY; INTEGER PROGRAMMING; POLYNOMIALS; VLSI CIRCUITS;

CORE-BASED DESIGN IMPLEMENTATIONS; DELAY BUDGETING; TIMING CONSTRAINT;

SYSTEMS ANALYSIS;

EID: 3843057942     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.829812     Document Type: Article

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