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Volumn , Issue , 2000, Pages 147-152

Voltage reduction of application-specific heterogeneous multiprocessor systems for power minimisation

Author keywords

[No Author keywords available]

Indexed keywords

ALLOCATION AND SCHEDULING; DESIGN STRATEGIES; HETEROGENEOUS MULTIPROCESSOR SYSTEMS; OPERATING VOLTAGE; POWER REDUCTIONS; POWER SOLUTIONS; TRIAL SOLUTIONS; VOLTAGE REDUCTION;

EID: 38049019005     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368434.368594     Document Type: Conference Paper
Times cited : (12)

References (14)
  • 1
    • 0000679218 scopus 로고
    • SOS: Synthesis of Application-Specific Heterogeneous Multiprocessor Systems
    • Shiv Prakash and Alice C. Parker, "SOS: Synthesis of Application-Specific Heterogeneous Multiprocessor Systems," Journal of Parallel and Distributed Computing, vol. 16, pp. 338-351, 1992.
    • (1992) Journal of Parallel and Distributed Computing , vol.16 , pp. 338-351
    • Prakash, S.1    Parker, A.C.2
  • 5
    • 0030146154 scopus 로고    scopus 로고
    • Power Dissipation Analysis and Optimisation of Deep Submicron CMOS Digital Circuits
    • May
    • Richard X. Gu and Mohamed I. Elmasry, "Power Dissipation Analysis and Optimisation of Deep Submicron CMOS Digital Circuits," IEEE Journal of Solid-State Circuits, vol. 31, no. 5, pp. 707-713, May 1996.
    • (1996) IEEE Journal of Solid-State Circuits , vol.31 , Issue.5 , pp. 707-713
    • Gu, R.X.1    Elmasry, M.I.2
  • 7
    • 0029700814 scopus 로고    scopus 로고
    • A High-Speed Low-Power 0.3um CMOS Gate-Array with Variable Threshold Voltage (VT) Scheme
    • May
    • T. Kuroda et al., "A High-Speed Low-Power 0.3um CMOS Gate-Array with Variable Threshold Voltage (VT) Scheme," in IEEE CICC-96, May 1996, pp. 53-56.
    • (1996) IEEE CICC-96 , pp. 53-56
    • Kuroda, T.1
  • 8
    • 0031639539 scopus 로고    scopus 로고
    • Design Methodology of Ultra Low-power MPEG4 Codec Core Exploiting Voltage Scaling Techniques
    • Kimiyoshi Usami et al., "Design Methodology of Ultra Low-power MPEG4 Codec Core Exploiting Voltage Scaling Techniques," in 35th Design Automation Conference, June 1998.
    • 35th Design Automation Conference, June 1998
    • Usami, K.1
  • 11
    • 0029191132 scopus 로고
    • SHEMUS: Synthesis of heterogeneous multiprocessor systems
    • August
    • Muhammad K. Dhodhi, Imtiaz Ahmad, and Robert Storer, "SHEMUS: synthesis of heterogeneous multiprocessor systems," Microprocessors and Microsystems, vol. 19, no. 6, pp. 311-319, August 1995.
    • (1995) Microprocessors and Microsystems , vol.19 , Issue.6 , pp. 311-319
    • Dhodhi, M.K.1    Ahmad, I.2    Storer, R.3
  • 12
    • 84930619379 scopus 로고    scopus 로고
    • Application-Specific Heterogeneous Multiprocessor Synthesis Using Differential Evolution
    • IEEE Press
    • Allan R. Rae and Sri Parameswaran, "Application-Specific Heterogeneous Multiprocessor Synthesis Using Differential Evolution," in ISSS'98. 1998, IEEE Press.
    • (1998) ISSS'98
    • Rae, A.R.1    Parameswaran, S.2
  • 14
    • 0031166039 scopus 로고    scopus 로고
    • An Architectural Co-Synthesis Algorithm for Distributed, Embedded Computing Systems
    • June
    • Wayne H. Wolf, "An Architectural Co-Synthesis Algorithm for Distributed, Embedded Computing Systems," IEEE Trans. VLSI, vol. 5, no. 2, pp. 218-229, June 1997.
    • (1997) IEEE Trans. VLSI , vol.5 , Issue.2 , pp. 218-229
    • Wolf, W.H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.