A process variation aware low power synthesis methodology for fixed-point FIR filters

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn , Issue , 2007, Pages 147-152

  Banerjee, Nilanjan ^a   Choi, Jung Hwan ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

Fixed point FIR filters; Low power; Synthesis; Variation aware

Indexed keywords

FIXED-POINT FIR FILTERS; LOW POWER; VARIATION AWARE;

ALGORITHMS; FIR FILTERS; PARAMETER ESTIMATION;

ENERGY DISSIPATION;

EID: 36949037268     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1283780.1283813     Document Type: Conference Paper

References (11)

1. K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, Wiley, NY 1999.
2. R. M. Hewlitt et al., "Canonical signed digit representation for FIR digital filters",SIPS 2001, pp. 416426.
3. C. Yao et al., "A Novel Common-Subexpression-Elimination Method for Synthesizing Fixed-Point FIR Filters", TCAS-1, vol 51, 2004, pp. 2215-2211.
4. Y. Takahashi et al., "New Cost-effective VLSI Impl. of Multiplierless FIR Filter using Common Subexpression Elimination", ISCAS 2005, pp. 1445-1448.
5. A. Hosangadi et al., "Algebraic Methods for Optimizing Constant Multiplications in Linear Systems", VLSI Signal Proc., March 2006.
6. S. Borkar et al., "Parameter variations and impact on circuits and microarchitecture", DAC 2003, pp. 338-342.
7. Synopsys, http://www.synopsys.com.
8. Predictive Technology Model, http://www.eas.asu.edu/~ptm/
9. Y.C.Lim et al., "Discrete coefficient FIR digital filter design based upon an LMS criteria," TCAS, vol. 30, 1983, pp. 723-739.
10. J.G. Proakis et al. "Digital Signal Processing:Principles, Algorithms and Applications", Prentice Hall, NJ, 1996.
11. C.H. Kim et al., "On-die CMOS leakage current sensor for measuring process variation in sub-90nm generations", Symp. Of VLSI Circuits, 2004,pp.250-251.