-
1
-
-
0022079957
-
An analysis of the thermal response of power chip package
-
V. Kadambi, J. Abuaf, "An analysis of the thermal response of power chip package", IEEE Trans. Electron Devices, ED-3 (1973), 1024-1033.
-
(1973)
IEEE Trans. Electron Devices
, vol.ED-3
, pp. 1024-1033
-
-
Kadambi, V.1
Abuaf, J.2
-
2
-
-
0024048303
-
Thermal analysis of solid-state devices using the boundary element Method
-
C.C. Lee, A.L. Palisoc, J.M.W. Baynham, "Thermal analysis of solid-state devices using the boundary element Method", IEEE Transactions on Electron Devices, ED-35, (1988), 1151-1153
-
(1988)
IEEE Transactions on Electron Devices
, vol.ED-35
, pp. 1151-1153
-
-
Lee, C.C.1
Palisoc, A.L.2
Baynham, J.M.W.3
-
3
-
-
0024942320
-
Thermal analysis of integrated circuit devices and packages
-
C.C. Lee, A.L. Palisoc, Y.J. Min, "Thermal analysis of integrated circuit devices and packages", IEEE Transaction on Components, Packaging, and Manufacturing Technology, Vol. 12, (1989), 701-709
-
(1989)
IEEE Transaction on Components, Packaging, and Manufacturing Technology
, vol.12
, pp. 701-709
-
-
Lee, C.C.1
Palisoc, A.L.2
Min, Y.J.3
-
4
-
-
0033714671
-
Analytical approach for thermal and electrical design of multilayer structure integrated devices
-
M. Pesare, A. Giorgio and A.G. Perri, "Analytical approach for thermal and electrical design of multilayer structure integrated devices", Electronics Letter, Vol. 36, No. 13, (2000), 1020-1021.
-
(2000)
Electronics Letter
, vol.36
, Issue.13
, pp. 1020-1021
-
-
Pesare, M.1
Giorgio, A.2
Perri, A.G.3
-
5
-
-
0034291496
-
Thermal analysis of solid-state devices and circuits: An analytical approach
-
N. Rinaldi, "Thermal analysis of solid-state devices and circuits: An analytical approach", Solid State Electronics. Vol. 44, no. 10, (2000), 1789-1798.
-
(2000)
Solid State Electronics
, vol.44
, Issue.10
, pp. 1789-1798
-
-
Rinaldi, N.1
-
6
-
-
77956508641
-
Electrothermal Simulation of Hot-Spot Phenomena in Cellular Bipolar Power Transistors: The Influence of Package Thermal Resistance
-
Kauai, Hawaii, USA, July
-
P.E. Bagnoli, C. Casarosa, S. di Pascoli, "Electrothermal Simulation of Hot-Spot Phenomena in Cellular Bipolar Power Transistors: the Influence of Package Thermal Resistance", Proceedings of IPACK2001, IPACK2001-15547, Kauai, Hawaii, USA, July 2001.
-
(2001)
Proceedings of IPACK2001, IPACK2001-15547
-
-
Bagnoli, P.E.1
Casarosa, C.2
di Pascoli, S.3
-
9
-
-
36949005858
-
Steady-State thermal mapping of electronic devices with multi-layer stack mountings by analytical relationships
-
Bled, Slovenia, June 13-16
-
Montesi, M., Bagnoli, P.E., Casarosa, C., Pasquinelli, M., "Steady-State thermal mapping of electronic devices with multi-layer stack mountings by analytical relationships". ITSS II ASME-ZSIS Conference, Bled, Slovenia, June 13-16, 2004.
-
(2004)
ITSS II ASME-ZSIS Conference
-
-
Montesi, M.1
Bagnoli, P.E.2
Casarosa, C.3
Pasquinelli, M.4
-
11
-
-
0004731806
-
-
Ed. MIR, Moscow
-
Krasnov, M.L, Kiselev, A.I. and Makarenko, G.I., Integral Equations, Ed. MIR, Moscow, 1980.
-
(1980)
Integral Equations
-
-
Krasnov, M.L.1
Kiselev, A.I.2
Makarenko, G.I.3
|