메뉴 건너뛰기




Volumn 28, Issue 12, 2007, Pages 1129-1131

Temperature-dependent characteristics of cylindrical gate-all-around twin silicon nanowire MOSFETs (TSNWFETs)

Author keywords

Gate all around (GAA); Nanostructured materials; Nanowire; Temperature

Indexed keywords

NANOWIRES; PHONON SCATTERING; SURFACE ROUGHNESS; TEMPERATURE; THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

EID: 36549047930     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2007.909868     Document Type: Article
Times cited : (26)

References (11)
  • 1
    • 33847734326 scopus 로고    scopus 로고
    • High performance 5 nm radius twin silicon nanowire MOSFET (TSNWFET): Fabrication on bulk Si wafer, characteristics, and reliability
    • S. D. Suk et al., "High performance 5 nm radius twin silicon nanowire MOSFET (TSNWFET): Fabrication on bulk Si wafer, characteristics, and reliability," in IEDM Tech. Dig., 2005, pp. 717-720.
    • (2005) IEDM Tech. Dig , pp. 717-720
    • Suk, S.D.1
  • 2
    • 46049102044 scopus 로고    scopus 로고
    • Gate-all-around (GAA) twin silicon nanowire MOSFET (TSNWFET) with 15 nm length gate and 4 nm radius nanowires
    • K. H. Yeo et al., "Gate-all-around (GAA) twin silicon nanowire MOSFET (TSNWFET) with 15 nm length gate and 4 nm radius nanowires," in IEDM Tech. Dig., 2006, pp. 539-542.
    • (2006) IEDM Tech. Dig , pp. 539-542
    • Yeo, K.H.1
  • 3
    • 46049095086 scopus 로고    scopus 로고
    • Observation of single electron tunneling and ballistic transport in twin silicon nanowire MOSFETs (TSNWFETs) fabricated by top-down CMOS process
    • K. H. Cho et al., "Observation of single electron tunneling and ballistic transport in twin silicon nanowire MOSFETs (TSNWFETs) fabricated by top-down CMOS process," in IEDM Tech. Dig., 2006, pp. 543-546.
    • (2006) IEDM Tech. Dig , pp. 543-546
    • Cho, K.H.1
  • 4
    • 46049119669 scopus 로고    scopus 로고
    • Ultra-narrow silicon nanowire gate-all-around CMOS devices: Impact of diameter, channel-orientation and low temperature on device performance
    • N. Singh et al., "Ultra-narrow silicon nanowire gate-all-around CMOS devices: Impact of diameter, channel-orientation and low temperature on device performance," in IEDM Tech. Dig., 2006, pp. 547-550.
    • (2006) IEDM Tech. Dig , pp. 547-550
    • Singh, N.1
  • 7
    • 0029185370 scopus 로고
    • Silicon-on-insulator technology for high temperature metal oxide semiconductor devices and circuits
    • Jan
    • D. Flandre, "Silicon-on-insulator technology for high temperature metal oxide semiconductor devices and circuits," Mater. Sci. Eng. B, vol. 29, no. 1-3, pp. 7-12, Jan. 1995.
    • (1995) Mater. Sci. Eng. B , vol.29 , Issue.1-3 , pp. 7-12
    • Flandre, D.1
  • 8
    • 23744458365 scopus 로고    scopus 로고
    • J. Wang, E. Polizzi, A. Ghosh, S. Datta, and M. Lundstrom, Theoretical investigation of surface roughness scattering in silicon nanowire transistors, Appl. Phys. Lett., 87, no. 4, pp. 043 101-1-043 101-3, Jul. 2005.
    • J. Wang, E. Polizzi, A. Ghosh, S. Datta, and M. Lundstrom, "Theoretical investigation of surface roughness scattering in silicon nanowire transistors," Appl. Phys. Lett., vol. 87, no. 4, pp. 043 101-1-043 101-3, Jul. 2005.
  • 9
    • 33644633458 scopus 로고    scopus 로고
    • Temperature effects on trigate SOI MOSFETs
    • Mar
    • J.-P. Colinge et al., "Temperature effects on trigate SOI MOSFETs," IEEE Electron Device Lett., vol. 27, no. 3, pp. 172-174, Mar. 2006.
    • (2006) IEEE Electron Device Lett , vol.27 , Issue.3 , pp. 172-174
    • Colinge, J.-P.1
  • 10
    • 27844528513 scopus 로고    scopus 로고
    • M. J. Gilbert, R. Akis, and D. K. Ferry, Phonon-assisted ballistic to diffusive crossover in silicon nanowire transistors, J. Appl. Phys. 98, no. 9, pp. 094 303-1-094 303-8, Nov. 2005.
    • M. J. Gilbert, R. Akis, and D. K. Ferry, "Phonon-assisted ballistic to diffusive crossover in silicon nanowire transistors," J. Appl. Phys. vol. 98, no. 9, pp. 094 303-1-094 303-8, Nov. 2005.
  • 11
    • 36549021965 scopus 로고    scopus 로고
    • Green's function approach to transport through a gate-all-around Si nanowire under impurity scattering
    • arXiv:cOnd-mat/0706.2927
    • J. H. Oh, D. Ahn, Y. S. Yu, and S. W. Hwang, "Green's function approach to transport through a gate-all-around Si nanowire under impurity scattering," Phys. Rev. B, Condens. Matter, 2007. arXiv:cOnd-mat/0706.2927.
    • (2007) Phys. Rev. B, Condens. Matter
    • Oh, J.H.1    Ahn, D.2    Yu, Y.S.3    Hwang, S.W.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.