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Volumn , Issue , 2007, Pages 400-404

Exploiting fault tolerance towards power efficient wireless multimedia applications

Author keywords

[No Author keywords available]

Indexed keywords

CODE DIVISION MULTIPLE ACCESS; ELECTRIC POWER UTILIZATION; EMBEDDED SYSTEMS; FAULT TOLERANCE; MODEMS; MULTIMEDIA SYSTEMS;

EID: 36348989554     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CCNC.2007.85     Document Type: Conference Paper
Times cited : (6)

References (13)
  • 2
    • 36348990088 scopus 로고    scopus 로고
    • The International Technology Roadmap for Semiconductors ITRS
    • The International Technology Roadmap for Semiconductors (ITRS) http://www.itrs.net/Links/2005ITRS/Home2005.htm
  • 3
    • 25144514874 scopus 로고    scopus 로고
    • Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits
    • September
    • B. H. Calhoun, A. Wang and A. Chandrakasan. "Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits". IEEE Journal of Solid-State Circuits, vol 40, no. 9, September 2005.
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , Issue.9
    • Calhoun, B.H.1    Wang, A.2    Chandrakasan, A.3
  • 4
    • 31344455697 scopus 로고    scopus 로고
    • Ultra-Dynamic Voltage Scaling (UDVS) Using Sub-Threshold Operation and Local Voltage Dithering
    • Jan
    • B. H. Calhoun, A. P. Chandrakasan, "Ultra-Dynamic Voltage Scaling (UDVS) Using Sub-Threshold Operation and Local Voltage Dithering" IEEE Journal of Sloid State Circuits, Vol. 41, No. 1, Jan. 2006.
    • (2006) IEEE Journal of Sloid State Circuits , vol.41 , Issue.1
    • Calhoun, B.H.1    Chandrakasan, A.P.2
  • 8
    • 36348991339 scopus 로고    scopus 로고
    • An integrated cache/SRAM access time, cycle time, area, leakage, and dynamic power model CACTI
    • An integrated cache/SRAM access time, cycle time, area, leakage, and dynamic power model CACTI, http://quid.hpl.hp.com:9081/cacti/
  • 9
    • 36348949000 scopus 로고    scopus 로고
    • A 160mW, 80nA Standby, MPEG-4 Audiovisual LSI with 16Mb Embedded DRAM and a 5GOPS Adaptive Post Filter »
    • Paper 2.3
    • H. Arakida et. al. "A 160mW, 80nA Standby, MPEG-4 Audiovisual LSI with 16Mb Embedded DRAM and a 5GOPS Adaptive Post Filter ». Proc. ISSCC 2003. Paper 2.3.
    • (2003) Proc. ISSCC
    • Arakida, H.1    et., al.2
  • 11
    • 3042624706 scopus 로고    scopus 로고
    • Shoukourian, S.; Vardanian, V.; Zorian, Y.; SoC yield optimization via an embedded-memory test and repair infrastructure. Design & Test of Computers, IEEE 21, Issue 3, May-June 2004 Page(s):200 -207
    • Shoukourian, S.; Vardanian, V.; Zorian, Y.; SoC yield optimization via an embedded-memory test and repair infrastructure. Design & Test of Computers, IEEE Volume 21, Issue 3, May-June 2004 Page(s):200 -207
  • 12
    • 0003768329 scopus 로고    scopus 로고
    • New Mexico State University [Online, available
    • W.E. Ryan," A Turbo Code Tutorial," New Mexico State University [Online], available: http://www.ece.arizona.edu /~ryan/turbo2c.pdf.
    • A Turbo Code Tutorial
    • Ryan, W.E.1
  • 13
    • 34748916996 scopus 로고    scopus 로고
    • System Redundancy: A Means of Improving Process Variation Yield Degradation in Memory Arrays
    • A. M. Eltawil and F. J. Kurdahi. "System Redundancy: A Means of Improving Process Variation Yield Degradation in Memory Arrays." VLSI-DAT 2006.
    • VLSI-DAT 2006
    • Eltawil, A.M.1    Kurdahi, F.J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.