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Volumn 78, Issue 1, 2007, Pages

The new landscape of parallel computer architecture

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EID: 36049051263     PISSN: 17426588     EISSN: 17426596     Source Type: Conference Proceeding    
DOI: 10.1088/1742-6596/78/1/012066     Document Type: Article
Times cited : (29)

References (30)
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    • Computer Architecture: A Quantitative Approach; Fourth edn
    • Hennessy J L, D A Patterson 2006 Computer Architecture: A Quantitative Approach; fourth edn Morgan Kaufmann (San Francisco)
    • (2006) Morgan Kaufmann
    • Hennessy, J.L.1    Patterson, D.A.2
  • 3
    • 0032592096 scopus 로고    scopus 로고
    • Design challenges of technology scaling
    • Borkar S 1999 Design challenges of technology scaling IEEE Micro 19 (no. 4 Jul.-Aug.) 23-29
    • (1999) IEEE Micro , vol.19 , Issue.4 , pp. 23-29
    • Borkar, S.1
  • 4
    • 3242815471 scopus 로고    scopus 로고
    • Scaling to the End of Silicon with EDGE Architectures
    • Burger D, S W Keckler, K S McKinley, et al 2004 Scaling to the End of Silicon with EDGE Architectures IEEE Comput. 37 (7) 44-55 July
    • (2004) IEEE Comput. , vol.37 , Issue.7 , pp. 44-55
    • Burger, D.1    Keckler, S.W.2    McKinley, K.S.3
  • 8
    • 33646924323 scopus 로고    scopus 로고
    • Microarchitectures for systems on a chip in small process geometries
    • Sylvester D and K Keutzer 2001 Microarchitectures for systems on a chip in small process geometries Proceedings the IEEE (Apr.) 467-489
    • (2001) Proceedings the IEEE , Issue.APR. , pp. 467-489
    • Sylvester, D.1    Keutzer, K.2
  • 9
    • 36049006000 scopus 로고    scopus 로고
    • Eatherton W 2005 The Push of Network Processing to the Top of the Pyramid keynote address at Symp. on Architectures for Networking and Communications Systems p 26-28 Oct. Slides available at http://www.cesr.ncsu.edu/ancs/slides/ eathertonKeynote.pdf
    • (2005) The Push of Network Processing to the Top of the Pyramid , pp. 26-28
    • Eatherton, W.1
  • 10
    • 36048934752 scopus 로고    scopus 로고
    • Intel Polaris Chip: http://www.intel.com/research/platform/terascale/ teraflops.htm - ref-separator -
    • Intel Polaris Chip: http://www.intel.com/research/platform/terascale/ teraflops.htm - ref-separator -
  • 11
    • 36048956994 scopus 로고    scopus 로고
    • Top500 Project: http://www.top500.org/ - ref-separator -
    • Top500 Project: http://www.top500.org/ - ref-separator -
  • 12
    • 32044446057 scopus 로고    scopus 로고
    • Petascale Computational Systems
    • Bell G, J Gray, A Szalay 2006 Petascale Computational Systems IEEE Comput. 39 (Issue: 1 Jan.) 110-112
    • (2006) IEEE Comput. , vol.39 , Issue.1 JAN. , pp. 110-112
    • Bell, G.1    Gray, J.2    Szalay, A.3
  • 13
    • 0003158656 scopus 로고
    • Hitting the memory wall: Implications of the obvious
    • Wulf W and S McKee 1995 Hitting the memory wall: Implications of the obvious Comput. Architecture News 23 (1)
    • (1995) Comput. Architecture News , vol.23 , Issue.1
    • Wulf, W.1    McKee, S.2
  • 20
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  • 22
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    • Designing Reliable Systems from Unrealiable Components: The Challenges of Transistor Variability and Degradation
    • Borkar S 2005 Designing Reliable Systems from Unrealiable Components: The Challenges of Transistor Variability and Degradation IEEE Micro (Nov.-Dec.) 10-16
    • (2005) IEEE Micro , Issue.NOV. , pp. 10-16
    • Borkar, S.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.