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Volumn 11, Issue 8, 2004, Pages 663-665

Generation of signed-digit representations for integer multiplication

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; MULTIPLYING CIRCUITS; OPTIMIZATION; POLES AND ZEROS; TREES (MATHEMATICS);

EID: 3543054717     PISSN: 10709908     EISSN: None     Source Type: Journal    
DOI: 10.1109/LSP.2004.831725     Document Type: Article
Times cited : (21)

References (12)
  • 1
    • 84937078021 scopus 로고
    • Signed-digit representation for fast parallel arithmetic
    • Sept
    • A. Avizienis, "Signed-digit representation for fast parallel arithmetic," IRE Trans. Electron. Comput., vol. 10, pp. 389-400, Sept. 1961.
    • (1961) IRE Trans. Electron. Comput. , vol.10 , pp. 389-400
    • Avizienis, A.1
  • 2
    • 77957223221 scopus 로고
    • Binary arithmetic
    • G. W. Reitweisner, "Binary arithmetic," Adv. Comput., vol. 1, pp. 232-308, 1960.
    • (1960) Adv. Comput. , Issue.1 , pp. 232-308
    • Reitweisner, G.W.1
  • 5
    • 0001421451 scopus 로고
    • Number systems and arithmetic
    • H. L. Garner, "Number systems and arithmetic," Advances in Computers, vol. 6, pp. 131-194, 1965.
    • (1965) Advances in Computers , vol.6 , pp. 131-194
    • Garner, H.L.1
  • 6
    • 0036912803 scopus 로고    scopus 로고
    • Digital filter synthesis based on an algorithm to generate all minimal signed digit representations
    • Dec
    • I.-C. Park and H.-J. Kang, "Digital filter synthesis based on an algorithm to generate all minimal signed digit representations," IEEE Trans. Computer-Aided Design, vol. 12, pp. 1525-1529, Dec. 2002.
    • (2002) IEEE Trans. Computer-Aided Design , vol.12 , pp. 1525-1529
    • Park, I.-C.1    Kang, H.-J.2
  • 7
    • 0030260927 scopus 로고    scopus 로고
    • Subexpression sharing in filters using canonic signed-digit multipliers
    • R. I. Hartley, "Subexpression sharing in filters using canonic signed-digit multipliers," IEEE Trans. Circuits Syst. II, vol. 43, no. 10, pp. 677 688, 1996.
    • (1996) IEEE Trans. Circuits Syst. II , vol.43 , Issue.10 , pp. 677-688
    • Hartley, R.I.1
  • 8
    • 0032752016 scopus 로고    scopus 로고
    • A new algorithm for elimination of common subexpressions
    • R. Pasko et al., "A new algorithm for elimination of common subexpressions," IEEE Trans. Computer-Aided Design, vol. 18, no. 1, pp. 58-68, 1999.
    • (1999) IEEE Trans. Computer-Aided Design , vol.18 , Issue.1 , pp. 58-68
    • Pasko, R.1
  • 9
    • 0030086034 scopus 로고    scopus 로고
    • Multiple constant multiplications: Efficient and versatile framework and algorithms for exploring common subexpression elimination
    • M. Potkonjak, M. B. Srivastava, and A. Chandrakasan, "Multiple constant multiplications: Efficient and versatile framework and algorithms for exploring common subexpression elimination," IEEE Trans. Computer-Aided Design, vol. 15, no. 2, pp. 151-165, 1996.
    • (1996) IEEE Trans. Computer-Aided Design , vol.15 , Issue.2 , pp. 151-165
    • Potkonjak, M.1    Srivastava, M.B.2    Chandrakasan, A.3
  • 11
    • 0029374075 scopus 로고
    • Use of minimum-adder multiplier blocks in FIR digital filters
    • Sept
    • A. G. Dempster and M. D. Macleod, "Use of minimum-adder multiplier blocks in FIR digital filters," IEEE Trans. Circuits Syst. II, vol. 42, no. 9, pp. 569-577, Sept. 1995.
    • (1995) IEEE Trans. Circuits Syst. II , vol.42 , Issue.9 , pp. 569-577
    • Dempster, A.G.1    Macleod, M.D.2
  • 12
    • 0036283460 scopus 로고    scopus 로고
    • Extended results for minimum-adder constant integer multipliers
    • Phoenix, AZ May
    • O. Gustafsson, A. G. Dempster, and L. Wanhammer, "Extended results for minimum-adder constant integer multipliers," in Proc. ISCAS 2002, Phoenix, AZ, May 2002, pp. 73-76.
    • (2002) Proc. ISCAS 2002 , pp. 73-76
    • Gustafsson, O.1    Dempster, A.G.2    Wanhammer, L.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.