Design of 100nm single-electron transistor (SET) by 2D TCAD simulation

IEEE International Conference on Semiconductor Electronics, Proceedings, ICSE

Volumn , Issue , 2006, Pages 367-372

  Rasmi, Amiza ^a   Hashim, Uda ^b   Mat, Abdul Fatah Awang ^a  

^a UNIVERSITY PUTRA MALAYSIA   (Malaysia)

^b UNIVERSITY MALAYSIA PERLIS   (Malaysia)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ENERGY DISSIPATION; LSI CIRCUITS; PROBLEM SOLVING;

ELECTRON TRANSFER; GATE VOLTAGE; SINGLE ELECTRON TRANSISTORS (SET);

TRANSISTORS;

EID: 35148840217     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SMELEC.2006.381083     Document Type: Conference Paper

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