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Volumn , Issue , 2007, Pages 143-150

Semi-detailed bus routing with variation reduction

Author keywords

Bus; Routing; Variation

Indexed keywords

ALGORITHMS; BUSBARS; NETWORK ROUTING; OPTIMIZATION;

EID: 34748845819     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1231996.1232025     Document Type: Conference Paper
Times cited : (10)

References (9)
  • 2
    • 0036374273 scopus 로고    scopus 로고
    • Integrated Floorplanning with Buffer/Channel Insertion for BusBased Microprocessor Designs
    • F.Rafiq, M.Chrzanowska-Jeske, H.Yang and N.Sherwani, "Integrated Floorplanning with Buffer/Channel Insertion for BusBased Microprocessor Designs", ISPD 2002, pages 56-61.
    • (2002) ISPD , pp. 56-61
    • Rafiq, F.1    Chrzanowska-Jeske, M.2    Yang, H.3    Sherwani, N.4
  • 4
    • 0036916525 scopus 로고    scopus 로고
    • CAD Computation for Manufacturability: Can We Save VLSI Technology from Itself?
    • M. Lavin and L. Liebmann, "CAD Computation for Manufacturability: Can We Save VLSI Technology from Itself?", Int. Conf. Computer-Aided Design, 2002, pages 424-431.
    • (2002) Int. Conf. Computer-Aided Design , pp. 424-431
    • Lavin, M.1    Liebmann, L.2
  • 5
    • 0029713094 scopus 로고    scopus 로고
    • Performance Evaluation of a Microprocessor with On-Chip DRAM and High Bandwidth Internal Bus
    • May
    • S. Iwata, et al., "Performance Evaluation of a Microprocessor with On-Chip DRAM and High Bandwidth Internal Bus", IEEE Custom Integrated Circuits Conf., May 1996, pages 269-272.
    • (1996) IEEE Custom Integrated Circuits Conf , pp. 269-272
    • Iwata, S.1
  • 6
    • 0028581583 scopus 로고
    • Routing a Multi-Terminal Critical Net: Steiner Tree Construction in the Presence of Obstacles
    • J.L. Ganley and J.P. Cohoon, "Routing a Multi-Terminal Critical Net: Steiner Tree Construction in the Presence of Obstacles", Int. Symp. Circuits and Systems, 1994, pages 113-116.
    • (1994) Int. Symp. Circuits and Systems , pp. 113-116
    • Ganley, J.L.1    Cohoon, J.P.2
  • 7
    • 0031705566 scopus 로고    scopus 로고
    • Efficient Algorithms for the Minimum Shortest Path Steiner Arborescence Problem with Applications to VLSI Physical Design
    • Jan
    • J. Cong, A.B. Kahng and K.S. Leung, "Efficient Algorithms for the Minimum Shortest Path Steiner Arborescence Problem with Applications to VLSI Physical Design", IEEE Trans. CAC of IC and Systems, vol. 17, no. 1, Jan 1998, pages 24-39.
    • (1998) IEEE Trans. CAC of IC and Systems , vol.17 , Issue.1 , pp. 24-39
    • Cong, J.1    Kahng, A.B.2    Leung, K.S.3
  • 9
    • 0021156743 scopus 로고
    • Topological Routing of Multi-Bit Data Buses
    • G. Persky and L. V. Tran, "Topological Routing of Multi-Bit Data Buses", Design Automation Conf., 1984, pages 679-682.
    • (1984) Design Automation Conf , pp. 679-682
    • Persky, G.1    Tran, L.V.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.