Reducing leakage power in instruction cache using WDC for embedded processors

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2, Issue , 2005, Pages 1292-1295

  Lu, Xin ^a   Fu, Yuzhuo ^a  

^a SHANGHAI JIAO TONG UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; CACHE MEMORY; COMPUTER AIDED DESIGN; ENERGY UTILIZATION; LEAKAGE CURRENTS; PROGRAMMABLE LOGIC CONTROLLERS; SYSTEM-ON-CHIP;

ASSOCIATIVITY; CACHE ARCHITECTURE; EMBEDDED PROCESSORS; INSTRUCTION CACHES; LEAKAGE POWER; LOW LEAKAGE POWER; PROCESSOR CHIPS; WAY-DECAY CACHE;

EMBEDDED SYSTEMS;

EID: 36948999300     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1121046     Document Type: Conference Paper

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