An efficient approach to on-chip logic minimization

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 9, 2007, Pages 1040-1050

  Ahmad, Seraj ^a   Mahapatra, Rabi N ^b  

^a MAGMA DESIGN AUTOMATION   (United States)

^b TEXAS A AND M UNIVERSITY   (United States)

Author keywords

Access control list (ACL); Compaction; Internet protocol (IP); Logic minimization; Minimization trie (m Trie); Routing table; Ternary content addressable memory (TCAM)

Indexed keywords

ACCESS CONTROL; ALGORITHMS; INTERNET PROTOCOLS; OPTIMIZATION;

ACCESS CONTROL LIST (ACL); LOGIC MINIMIZATION; MINIMIZATION TRIE (M-TRIE); ROUTING TABLE; TERNARY CONTENT ADDRESSABLE MEMORY (TCAM);

LOGIC CIRCUITS;

EID: 34548106393     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.902202     Document Type: Article

References (25)

1. H. Liu, "Routing table compaction in ternary-CAM," IEEE Micro, vol. 15, no. 5, pp. 58-64, Jan./Feb. 2002.
2. R. Lysecky and F. Vahid, "On-chip logic minimization," in Proc. 40th Conf. Des. Autom., 2003, pp. 334-337.
3. G. Stitt, R. Lysecky, and F. Vahid, "Dynamic hardware/software partitioning: A first approach," in Proc. 40th Conf. Des. Autom., 2003, pp. 250-255.
4. R. Brayton et al., Logic Minimization Algorithm for VLSI Synthesis. Boston, MA: Kluwer, 1984.
5. S. Ahmad and R. Mahapatra, "m-Trie - A fast and efficient approach to on-chip logic minimization," in Proc. Int. Conf. Comput.-Aided Des., 2004, pp. 428-435.
6. W. V. Quine, "The problem of simplifying truth functions," Amer. Math. Monthly, vol. 59, no. 8, pp. 521-531, 1952.
7. W. Quine, "A way to simplify truth functions," Amer. Math. Monthly, vol. 62, no. 9, pp. 627-631, 1955.
8. E. J. McCluskey, "Minimization of boolean functions," Bell Syst. Technol. J., vol. 35, no. 6, pp. 1417-1444, Nov. 1956.
9. S. Kang and W. M. vanCleemput, "Automatic PLA synthesis from a DDL-P description," in Proc. 18th Conf. Des. Autom., 1981, pp. 391-397.
10. D. W. Brown, "A state-machine synthesizer - SMS," in Proc. 18th Conf. Des. Autom., 1981, pp. 301-305.
11. S. J. Hong, R. G. Cain, and D. L. Ostapko, "Mini: A heuristic approach for logic minimization," IBM J. Res. Develop., vol. 59, no. 18, pp. 443-458, Sep. 1974.
12. D. Alessandri, "Access control list processing in hardware," M.S. thesis, Elect. Eng. Dept., Eidgenossische Technische Hochschule, Zurich, Switzerland, 1997.
13. P. Gupta, "Algorithms for routing lookups and packet classification," Ph.D. dissertation, Dept. Comput. Sci., Stanford University, Stanford, CA, 2000.
14. M. Ruiz-Sánchez, E. W. Biersack, and W. Dabbous, "Survey and taxonomy of IP address lookup algorithms," IEEE Netw., vol. 15, no. 2, pp. 8-23, Mar./Apr. 2001.
15. A. J. McAuley and P. Francis, "Fast routing table lookup using CAMs," in Proc. INFOCOM (3), 1993, pp. 1382-1391.
16. SiberCore Technologies, Ottawa, ON, Canada, "Ultra 2M Family," SCT2000CB3, 2004. [Online]. Available: www.sibercore.com
17. F. Zane, G. Narlikar, and A. Basu, "CoolCAMs: Power-efficient TCAMs for forwarding engines," in Proc. INFOCOMM, 2003, pp. 42-52.
18. R. Panigrahi and S. Sharma, "Reducing TCAM power comsumption. and increasing throughput," in Proc. HOT Interconnects, 2002, pp. 107-107.
19. V. C. Ravikumar, R. N. Mahapatra, and L. N. Bhuyan, "EaseCAM: An energy and storage efficient TCAM-based router architecture for IP lookup," IEEE Trans. Comput., vol. 54, no. 5, pp. 521-533, May 2005.
20. Intrinsyc, Vancouver, BC, Canada, "Cerfcube 255 with embedded Linux," [Online]. Available: http://www.intrinsyc.com/products/cerfcube
21. Integrated Device Technology, Inc., San Jose, CA, "Taking packet processing to the next level," 2002.
22. Integrated Device Technology, Inc., San Jose, CA, "Intrusion prevention without security holes," 2004.
23. Cisco Systems Inc., San Jose, CA, "Understanding ACL merge algorithms and ACL hardware resources on Cisco Catalyst 6500 switches," 2003.
24. D. Shah and P. Gupta, "Fast incremental updates on ternary-CAMs for routing lookups and packet classification," presented at the HOT Interconnects (8), Stanford, CA, 2000.
25. K. J. Schultz, "CAM-based circuits for ATM switching networks," Ph.D. dissertation, Dept. Elect. Comput. Eng., Univ. Toronto, Toronto, ON, Canada, 1996.