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Volumn 2778, Issue , 2003, Pages 161-170

A dynamically adaptive switching fabric on a multicontext reconfigurable device

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; HARDWARE;

EID: 34547971668     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-45234-8_17     Document Type: Article
Times cited : (6)

References (11)
  • 1
    • 0842329349 scopus 로고    scopus 로고
    • A Dynamically Reconfigurable Processor Architecture
    • Oct.
    • M. Motomura: "A Dynamically Reconfigurable Processor Architecture," Microprocessor Forum, Oct. 2002.
    • (2002) Microprocessor Forum
    • Motomura, M.1
  • 2
    • 79955157273 scopus 로고    scopus 로고
    • The Age of Adaptive Computing Is Here
    • P. Master: "The Age of Adaptive Computing Is Here," Proc. of FCCM, pp.1-3 (2002).
    • (2002) Proc. of FCCM , pp. 1-3
    • Master, P.1
  • 4
    • 0036054393 scopus 로고    scopus 로고
    • Dynamic Hardware Plugins in an FPGA with Partial Run-time Reconfiguration
    • June
    • E.L. Horta, J.W. Lockwood, D. Partour, "Dynamic Hardware Plugins in an FPGA with Partial Run-time Reconfiguration." Proc. of DAC2002, June (2002).
    • (2002) Proc. of DAC2002
    • Horta, E.L.1    Lockwood, J.W.2    Partour, D.3
  • 5
    • 84947979919 scopus 로고
    • WASMII: A Data Driven Computer on a Virtual Hardware
    • X.-P. Ling, H. Amano, "WASMII: A Data Driven Computer on a Virtual Hardware" Proc. FCCM, pp. 33-42, (1993).
    • (1993) Proc. FCCM , pp. 33-42
    • Ling, X.-P.1    Amano, H.2
  • 7
    • 79955127487 scopus 로고    scopus 로고
    • A General Hardware Design Model for Multicontext FPGAs
    • N. Kaneko, H. Amano, "A General Hardware Design Model for Multicontext FPGAs," Proc. of FPL, pp.1037-1047, (2002).
    • (2002) Proc. of FPL , pp. 1037-1047
    • Kaneko, N.1    Amano, H.2
  • 8
    • 0009718813 scopus 로고    scopus 로고
    • High-speed network switch RHiNET-2/SW and its implementation with optical interconnections
    • Aug.
    • S. Nishimura, et al., "High-speed network switch RHiNET-2/SW and its implementation with optical interconnections", Hot Interconnects 8, pp.31-38, Aug. (2000).
    • (2000) Hot Interconnects , vol.8 , pp. 31-38
    • Nishimura, S.1
  • 9
    • 0842286247 scopus 로고    scopus 로고
    • The Swappable Logic Unit: A Paradigm for Virtual Hardware
    • G. Brebner, "The Swappable Logic Unit: a Paradigm for Virtual Hardware," Proc. of FCCM, pp.82-91, (1997).
    • (1997) Proc. of FCCM , pp. 82-91
    • Brebner, G.1
  • 10
    • 84949777938 scopus 로고    scopus 로고
    • Configuration Caching Management Techniques for Reconfigurable Computing
    • Z. Li, K. Compton, S. Hauck, "Configuration Caching Management Techniques for Reconfigurable Computing," Proc. of FCCM, pp.22-36, (2000).
    • (2000) Proc. of FCCM , pp. 22-36
    • Li, Z.1    Compton, K.2    Hauck, S.3
  • 11
    • 0002413339 scopus 로고    scopus 로고
    • Evolvable hardware chips for industrial applications
    • T. Higuchi and N.Kajihara, "Evolvable hardware chips for industrial applications," Commun. ACM, Vol.42, No.3, pp.60-66, (1999).
    • (1999) Commun. ACM , vol.42 , Issue.3 , pp. 60-66
    • Higuchi, T.1    Kajihara, N.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.