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A gate-level EHW chip: Implementing Ga operations and reconfigurable hardware on a single LSI
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Kajitani, I., Hoshino, T., Nishikawa, D., Yokoi, H., Nakaya, S., Yamauchi, T., Inuo, T., Kajihara, N., Iwata, M., Keymeulen, D., and Higuchi, T. A gate-level EHW chip: Implementing GA operations and reconfigurable hardware on a single LSI. In Proceedings of the International Conference on Evolvable Systems, (Sept. 1998), 1-12.
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0042744587
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Comparison between an off-line model-free and an on-line model-based evolution applied to a robotics navigation system using evolvable hardware
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C. Adami, R. K. Belew, H. Kitano and C.E. Taylor, Eds., MIT Press
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Keymeulen, D., Iwata, M., Kuniyoshi, Y. and Higuchi, T. Comparison between an off-line model-free and an on-line model-based evolution applied to a robotics navigation system using evolvable hardware. In Artificial Life VI: Proceedings of the Sixth International Conference on Artificial Life, C. Adami, R. K. Belew, H. Kitano and C.E. Taylor, Eds., MIT Press, 1998, 109-209.
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0032686680
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The GRD chip: Genetic reconfiguration of DSPs for neural network processing
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June To appear
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Murakawa, M., Yoshizawa, S., Kajitani, I., Yao, X., Kajihara, N., Iwata, M., and Higuchi, T. The GRD chip: Genetic reconfiguration of DSPs for neural network processing. IEEE Transactions on Computers (June 1999). To appear.
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IEEE Transactions on Computers
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Murakawa, M.1
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Analogue EHW chip for Intermediate Frequency Filter
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0031645659
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Evolvable hardware chip for high precision printer image compression
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Madison, Wisconsin, July
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Sakanashi, H. Salami, M. Iwata, M. Nakaya, S. Yamauchi, T., Inuo, T., Kajihara, N., and Higuchi, T. Evolvable hardware chip for high precision printer image compression In Proceedings of the 15th National Conference on Artificial Intelligence (AAAI-98), (Madison, Wisconsin, July 1998), 486-491.
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