메뉴 건너뛰기




Volumn 3, Issue , 2007, Pages 649-653

Compact models for asymmetric double gate MOSFETs

Author keywords

Analytic solutions; Compact model; Double gate; MOSFETs

Indexed keywords

CIRCUIT SIMULATION; GATES (TRANSISTOR); SEMICONDUCTOR DEVICE MODELS; SPICE; WORK FUNCTION;

EID: 34547968922     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (8)
  • 1
    • 33646033169 scopus 로고    scopus 로고
    • An Analytic Potential Model for Symmetric and Asymmetric DG MOSFETs
    • May
    • H. Lu and Y. Taur, "An Analytic Potential Model for Symmetric and Asymmetric DG MOSFETs," IEEE Trans.Electron Devices, Vol. 53, No. 5, May 2006.
    • (2006) IEEE Trans.Electron Devices , vol.53 , Issue.5
    • Lu, H.1    Taur, Y.2
  • 2
    • 52649174709 scopus 로고    scopus 로고
    • Physics-Based, Non-Charge-Sheet Compact Modeling of Double Gate MOSFETs
    • Anaheim, Ca
    • H. Lu and Y. Taur, "Physics-Based, Non-Charge-Sheet Compact Modeling of Double Gate MOSFETs," Nanotech, Anaheim, Ca., 2005.
    • (2005) Nanotech
    • Lu, H.1    Taur, Y.2
  • 3
    • 1342286939 scopus 로고    scopus 로고
    • A continuous, analytic drain-current model for DG-MOSFETS
    • Y. Taur, X. Liang, W.Wang and H. Liu, "A continuous, analytic drain-current model for DG-MOSFETS," IEEE Electron Device Lett.,vol 25.,no.2, pp. 107-109, 2004.
    • (2004) IEEE Electron Device Lett , vol.25 , Issue.2 , pp. 107-109
    • Taur, Y.1    Liang, X.2    Wang, W.3    Liu, H.4
  • 4
    • 0033732282 scopus 로고    scopus 로고
    • An analytical Solution to a Double-Gate MOSFET with Undoped Body
    • Y. Taur, "An analytical Solution to a Double-Gate MOSFET with Undoped Body," IEEE Electron Device Lett, vol 21.,no.5, pp. 245-247, 2000.
    • (2000) IEEE Electron Device Lett , vol.21 , Issue.5 , pp. 245-247
    • Taur, Y.1
  • 5
    • 4444270647 scopus 로고    scopus 로고
    • A 2-D Analytical Solution for SCEs in DG MOSFETs
    • August
    • X. Liang, Y. Taur, "A 2-D Analytical Solution for SCEs in DG MOSFETs",IEEE Trans. Electron Devices, Vol. 51, No. 8, August 2004.
    • (2004) IEEE Trans. Electron Devices , vol.51 , Issue.8
    • Liang, X.1    Taur, Y.2
  • 7
    • 34547969277 scopus 로고    scopus 로고
    • Compact Models for the I-V Characteristics of Double Gate and Surround Gate MOSFETs
    • ISBN: 1-4244-0267-0, pp, June 25-28, San Jose, CA
    • H. Morris, H. Abebe, E. Cumberbatch and V. Tyree, "Compact Models for the I-V Characteristics of Double Gate and Surround Gate MOSFETs", IEEE UGIM Proceedings, ISBN: 1-4244-0267-0, pp. 117-121, June 25-28, 2006,San Jose, CA. (2006)
    • (2006) IEEE UGIM Proceedings , pp. 117-121
    • Morris, H.1    Abebe, H.2    Cumberbatch, E.3    Tyree, V.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.