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Volumn , Issue , 2006, Pages 5347-5350
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A flexible transform processor architecture for multi-CODECs (JPEG, MPEG-2, 4 and H.264)
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER ARCHITECTURE;
DATA STORAGE EQUIPMENT;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
MOTION PICTURE EXPERTS GROUP STANDARDS;
PARALLEL PROCESSING SYSTEMS;
FLEXIBLE ARCHITECTURE;
FLEXIBLE ARCHITECTURES;
JPEG;
ANALOG TO DIGITAL CONVERSION;
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EID: 34547381619
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (16)
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References (7)
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