Hardware implementation of the optimized transform and quantization blocks of H.264

Canadian Conference on Electrical and Computer Engineering

Volumn 2, Issue , 2004, Pages 0943-0946

  Kordasiewicz, Roman ^a   Shirani, Shahram ^a  

^a MCMASTER UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CODING STANDARDS; INTEGER ARITHMETIC; QUANTIZATIONS;

BANDWIDTH; COMPUTER HARDWARE; COMPUTER PROGRAMMING; COMPUTER SOFTWARE; DISCRETE TIME CONTROL SYSTEMS; MATHEMATICAL MODELS; OPTIMIZATION; RECORDING;

IMAGE CODING;

EID: 5044237616     PISSN: 08407789     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. T. Wiegand, and G. Sullivan, Draft ITU-T recommendation and final draft international standard of joint video specification, ITU-T rec. H.264 | ISO/IEC 14496-10AVC, available: ftp://ftp.imtcfiles.org./jvt-experts
2. M. Horowitz, A. Joch, F. Kossentini, and A. Hallapuro, "H.264/AVC Baseline Profile Decoder Complexity Analysis," IEEE Transactions on Circuits and Systems for video technology, vol. 13, no. 7, July 2003
3. H. S. Malvar, A. Hallapuro, M. Karaczewicz, and L. Kerofsky, "Low-Complexity Transform and Quantization in H.264/AVC," IEEE Transactions on Circuits and Systems for video technology, vol. 13, no. 7, July 2003
4. I. E. G. Richardson, "H.264/MPEG-4 Part 10: Overview," www. vcodex.com, 20/12/2002