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Volumn , Issue , 2006, Pages 1631-1634

Compensation of track and hold frequency response mismatches in interleaved analog to digital converters for high-speed communications

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); COMMUNICATION SYSTEMS; DIGITAL SIGNAL PROCESSING; EQUALIZERS; ETHERNET; FREQUENCY RESPONSE; PARALLEL PROCESSING SYSTEMS; SIGNAL RECEIVERS;

EID: 34547374449     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (19)

References (12)
  • 1
    • 0026171346 scopus 로고
    • Techniques for high speed implementation of nonlinear cancellation
    • June
    • S. Kasturia and J. H. Winters, "Techniques for high speed implementation of nonlinear cancellation," IEEE J. Select. Areas Commun., vol. 9, no. 5, pp. 711-717, June 1991.
    • (1991) IEEE J. Select. Areas Commun , vol.9 , Issue.5 , pp. 711-717
    • Kasturia, S.1    Winters, J.H.2
  • 3
    • 15744401956 scopus 로고    scopus 로고
    • Maximum likelihood sequence estimation in dispersive optical channels
    • Feb
    • O. E. Agazzi, M. R. Hueda, H. S. Carrer, and D. E. Crivelli, "Maximum likelihood sequence estimation in dispersive optical channels," IEEE J. Lightwave Technol., vol. 23, no. 2, pp. 749-763, Feb. 2005.
    • (2005) IEEE J. Lightwave Technol , vol.23 , Issue.2 , pp. 749-763
    • Agazzi, O.E.1    Hueda, M.R.2    Carrer, H.S.3    Crivelli, D.E.4
  • 4
    • 34547309645 scopus 로고    scopus 로고
    • Online, Available
    • IEEE 802.3aq Task Force. [Online]. Available: http://www.ieee802. org/3/aq/
    • IEEE 802.3aq Task Force
  • 5
    • 34248678757 scopus 로고    scopus 로고
    • Online, Available
    • IEEE 802.3an Task Force. [Online]. Available: http://www.ieee802. org/3/an/
    • IEEE 802.3an Task Force
  • 6
    • 4644225364 scopus 로고    scopus 로고
    • Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter
    • Jan
    • S. M. Jamal, D. Fu, M. P. Singh, P. J. Hurst, and S. H. Lewis, "Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter," IEEE Trans. Circuits Syst. I, vol. 51, no. 1, pp. 130-139, Jan. 2004.
    • (2004) IEEE Trans. Circuits Syst. I , vol.51 , Issue.1 , pp. 130-139
    • Jamal, S.M.1    Fu, D.2    Singh, M.P.3    Hurst, P.J.4    Lewis, S.H.5
  • 7
    • 34547346146 scopus 로고    scopus 로고
    • Background calibration of interleaved analog to digital converters for high-speed communications using interleaved timing recovery techniques
    • May
    • O. Agazzi and V. Gopinathan, "Background calibration of interleaved analog to digital converters for high-speed communications using interleaved timing recovery techniques," Proc. IEEE Int. Symp. Circuits and Syst., pp. 1390-1393, May 2005.
    • (2005) Proc. IEEE Int. Symp. Circuits and Syst , pp. 1390-1393
    • Agazzi, O.1    Gopinathan, V.2
  • 12


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.