A new level shifter with low power in multi-voltage system

ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Volumn , Issue , 2006, Pages 1857-1859

  Bo, Zhang ^a   Liping, Liang ^a   Xingjun, Wang ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ENERGY DISSIPATION; LEAKAGE CURRENTS; PHASE SHIFTERS; SPICE; VOLTAGE MEASUREMENT;

LEVEL SHIFTER; MULTI VOLTAGE SYSTEM;

DIGITAL CIRCUITS;

EID: 34547367530     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSICT.2006.306488     Document Type: Conference Paper

References (5)

1. Liqiong Wei; Roy, K.; De, V.K.; "Low voltage low power CMOS design techniques for deep submicron ICs", VLSI Design.2000. Thirteenth International Conference, Page(s):24-29, 3-7 Jan. 2000
2. A. Chandrakasan and R. Broderson, Low-power CMOS Design, IEEE Press, 1998.
3. M. Hamada, et al., "A Top-down Low Power Design Technique Using Cluster Voltage Scaling with Variable Supply Voltage Scheme", Custom Integrated Circuits Conference, pp.495-498, 1998
4. Kyoung-Hoi Koo; Jin-Ho Seo; Myeong-Lyong Ko; Jae-Whui Kim;" A new level-up shifter for high speed and wide range interface in ultra deep sub-micron", ISCAS, pp. 1063-1065, May. 2005
5. Puri, R.; Kung, D.; Stok, L.; "Minimizing power with flexible voltage islands", ISCAS,pp21-24,May.2005