A stream register file unit for reconfigurable processors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 3678-3681

  Campi, F ^a   Zoffoli, P ^b   Mucci, C ^b   Bocchi, M ^b   Deledda, A ^b   De Dominicis, M ^b   Vitkovski, A ^b  

^a STMICROELECTRONICS   (Italy)

^b UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; FILE ORGANIZATION; SILICON;

ALGORITHM MAPPING; LOGIC UNITS; STREAM REGISTER FILE (SRF);

PROGRAM COMPILERS;

EID: 34547322856     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)

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