Simulations of field-plated and recessed gate gallium nitride-based heterojunction field-effect transistors

International Journal of High Speed Electronics and Systems

Volumn 17, Issue 1, 2007, Pages 19-23

  Turin, Valentin O ^a   Shur, Michael S ^a   Veksler, Dmitry B ^b  

^a RENSSELAER POLYTECHNIC INSTITUTE   (United States)

^b Rensselaer Polytechnic Institute   (United States)

Author keywords

Cutoff frequency; Gallium nitride; Heterojunction field effect transistor

Indexed keywords

COMPUTER SIMULATION; CUTOFF FREQUENCY; DRAIN CURRENT; ELECTRIC FIELDS; GALLIUM NITRIDE; HETEROJUNCTIONS;

DRAIN FIELD; DRAIN-TO-SOURCE BIAS; HETEROJUNCTION FIELD-EFFECT TRANSISTOR;

FIELD EFFECT TRANSISTORS;

EID: 34547314317     PISSN: 01291564     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0129156407004175     Document Type: Conference Paper

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