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Volumn , Issue , 2006, Pages 4531-4534

Programmable synaptic weights for an aVLSI network of spiking neurons

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL TO ANALOG CONVERSION; MICROPROCESSOR CHIPS; PARAMETER ESTIMATION; VLSI CIRCUITS;

EID: 34547270429     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (17)

References (13)
  • 2
    • 0033740171 scopus 로고    scopus 로고
    • Point-to-point connectivity between neuromorphic chips using address events
    • K. A. Boahen, "Point-to-point connectivity between neuromorphic chips using address events", IEEE Transactions on Circuits and Systems II, vol. 47, pp. 416-434, 2000.
    • (2000) IEEE Transactions on Circuits and Systems II , vol.47 , pp. 416-434
    • Boahen, K.A.1
  • 3
    • 0003005916 scopus 로고    scopus 로고
    • A pulse-coded communications infrastructure for neuromorphic systems
    • W. Maass, C. M. Bishop, Eds, Boston, MA: MIT Press, Ch. 6, pp, ISBN 0-262-13350-4
    • S. R. Deiss, R. J. Douglas, and A. M. Whatley, "A pulse-coded communications infrastructure for neuromorphic systems", in "Pulsed Neural Networks", W. Maass, C. M. Bishop, Eds., Boston, MA: MIT Press, Ch. 6, pp. 157-178, ISBN 0-262-13350-4, 1999.
    • (1999) Pulsed Neural Networks , pp. 157-178
    • Deiss, S.R.1    Douglas, R.J.2    Whatley, A.M.3
  • 4
    • 4644262757 scopus 로고    scopus 로고
    • Temporal coding in a network of silicon integrate-and-fire neurons
    • Special Issue on Temporal Coding for Neural Information Processing, Sep, pp
    • S.-C. Liu, and R. Douglas, "Temporal coding in a network of silicon integrate-and-fire neurons", IEEE Transactions on Neural Networks: Special Issue on Temporal Coding for Neural Information Processing, vol 15, no 5, Sep., pp. 1305-1314, 2004.
    • (2004) IEEE Transactions on Neural Networks , vol.15 , Issue.5 , pp. 1305-1314
    • Liu, S.-C.1    Douglas, R.2
  • 10
    • 0242443320 scopus 로고    scopus 로고
    • Compact Low-Power Calibration Mini-DACs for Neural Massive Arrays with Programmable Weights
    • Sep
    • B. Linares-Barranco, T. Serrano-Gotarredona , and R. Serrano-Gotarredona, "Compact Low-Power Calibration Mini-DACs for Neural Massive Arrays with Programmable Weights", IEEE Trans. n Neural Networks, vol. 14, No. 4, pp. 1207-1216, Sep.2003.
    • (2003) IEEE Trans. n Neural Networks , vol.14 , Issue.4 , pp. 1207-1216
    • Linares-Barranco, B.1    Serrano-Gotarredona, T.2    Serrano-Gotarredona, R.3
  • 11
    • 0026987730 scopus 로고
    • An inherently linear and compact MOST-only current division technique
    • Dec
    • K. Bult and GJGM Geelen, "An inherently linear and compact MOST-only current division technique", IEEE J. Solid-State Circuits, vol. 27, pp. 1730-1735, Dec. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 1730-1735
    • Bult, K.1    Geelen, G.J.G.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.