Dark current and noise of 100nm thick silicon on sapphire CMOS lateral PIN photodiodes

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 4583-4586

  Marwick, Miriam Adlerstein ^a   Tejada, Francisco ^a   Pouliquen, Philippe ^a   Culurciello, Eugenio ^b   Strohbehn, Kim ^c   Andreou, Andreas G ^a  

^a Johns Hopkins University   (United States)

^b Yale University   (United States)

^c JOHNS HOPKINS UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENT MEASUREMENT; PHOTODIODES; POLYSILICON; SPURIOUS SIGNAL NOISE;

FLICKER NOISE; POLYSILICON GATE STRUCTURES; SDBLOCK MASK; SILICON ON SAPPHIRE (SOS);

DARK CURRENTS;

EID: 34547262766     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. Peregrine Semiconductor Corporation, "http://www.psemi.com," 2004. [Online]. Available: http://www.psemi.com/
2. A. G. Andreou, Z. Kalayjian, A. Apsel, P. Pouliquen, R. Athale, G. Simonis, and R. Reedy, "Silicon on sapphire CMOS for optoelectronic microsystems," Circuits and Systems Magazine, IEEE, vol. 1, no. 3, pp. 22-30, 2001.
3. E. Culurciello, P. Pouliquen, A. Andreou; K. Strohbehn, and S. Jaskulek, "A monolithic digital galvanic isolation buffer fabricated in silicon on sapphire CMOS," IEE Electronics Letters, vol. 41, no. 9, pp. 526-528, April 2005.
4. E. Culurciello, P. Pouliquen, and A. Andreou, "An isolation charge pump fabricated in silicon on sapphire CMOS technology," IEE Electronics Letters, vol. 41, no, 10, pp. 590-592, May 2005.
5. G. Lyons, "Commercial SOS technology for radation-tolerant space applications," Radiation Effects Data Workshop, pp. 96-99, July 1998.
6. A. Apsel, E. Culurciello, A. Andreou, and K. Aliberti, "Thin film pin photodiodes for optoelectronic silicon on sapphire CMOS," in ISCAS '03. Proceedings of the 2003 International Symposium on Circuits and Systems., vol. 4, May 2003, pp. 908-911.
7. A. Apsel, J. Liu, and A. G. Andreou, "A 6 channel array of 500 MHz optical receivers in 5μm silicon on sapphire CMOS," Proceedings of the International Symposium on Circuits and Systems, vol. V, pp. 433-436, May 2002.
8. E. Culurciello and A. Andreou, "16 × 16 pixel silicon on sapphire CMOS digital pixel photosensor array," IEE Electronics Letter, vol. 40, no, 1, pp. 66-67, January 2004.
9. A. Afzalian and D. Flandre, "Physical modelling and design of thin film soi lateral pin photodiodes for blue dvd applications," 2004 IEEE International SOI Conference, pp. 21-23, 2004.
10. C. Xun, C. Shen, W. Wu, and M. Chan, "Backside-illuminated lateral pin photodiode for cmos image sensor on SOS substrate," IEEE Transactions on Electron Devices, vol. 52, no. 6, pp. 1110-1115, June 2005.
11. A. A. Abidi, "Automated system for the measurement of fluctuation phenomena in fets," Review of Sci. Instruments, vol. 59, no. 2, pp. 351-355, 1988.
12. Keithley Instruments Inc., "http://www.keithley.com/," 2006.
13. Iotech, Inc., "http://www.iotech.com/," 2006.
14. The Mathworks Inc., "http://www.mathworks.com/," 1994.
15. P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 3rd ed. John Wiley and Sons, 1993.
16. M. Ericson, C. Britton, J. Rochelle, B. Blalock, D. Binkley, A. Wintenberg, and B. Williamson, "Flicker noise behavior of mosfets fabricated in 0.5um fully depleted (fd) silicon-on-sapphire (SOS) CMOS in weak, moderate, and strong inversion," IEEE Transactions on Nuclear Science, pp. 963-968, August 2003.