Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies

Proceedings - Design Automation Conference

Volumn , Issue , 2006, Pages 49-52

  Issenin, Ilya ^a   Brockmeyer, Erik ^b   Durinck, Bart ^b   Dutt, Nikil ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b IMEC   (Belgium)

Author keywords

Customized memory hierarchy; Multiprocessor data reuse analysis; Scratch pad memory management

Indexed keywords

COMPUTER SOFTWARE REUSABILITY; DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS; ENERGY DISSIPATION; MICROPROCESSOR CHIPS; SYSTEMS ANALYSIS;

MEMORY HIERARCHIES; MEMORY HIERARCHY ORGANIZATIONS; MULTIPROCESSOR DATA REUSE ANALYSIS; QSDPCM; SCRATCH PAD MEMORY MANAGEMENT;

MULTIPROCESSING SYSTEMS;

EID: 34547227870     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1146909.1146925     Document Type: Conference Paper

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