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Volumn , Issue , 2005, Pages 53-56

A 6-Gbps/pin half-duplex LVDS I/O for high-speed mobile DRAM

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; ELECTRIC POWER UTILIZATION; EYE CONTROLLED DEVICES; JITTER; MOBILE DEVICES; TRANSCEIVERS;

EID: 34250778841     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2005.251805     Document Type: Conference Paper
Times cited : (6)

References (6)
  • 1
    • 0035309966 scopus 로고    scopus 로고
    • Boni, A.; Pierazzi, A.; Vecchi, D., LVDS I/O interface for Gb/s-perpin operation in 0.35-μm CMOS, Solid-State Circuits, IEEE Journal of, 36, Issue 4, pp. 706-711, April 2001.
    • Boni, A.; Pierazzi, A.; Vecchi, D., "LVDS I/O interface for Gb/s-perpin operation in 0.35-μm CMOS," Solid-State Circuits, IEEE Journal of, Volume 36, Issue 4, pp. 706-711, April 2001.
  • 2
    • 13444306573 scopus 로고    scopus 로고
    • Mingdeng Chen; Silva-Martinez, J.; Nix, M.; Robinson, M.E., Low-voltage low-power LVDS drivers, Solid-State Circuits, IEEE Journal of, 40, Issue 2, pp. 472-479, Feb. 2005.
    • Mingdeng Chen; Silva-Martinez, J.; Nix, M.; Robinson, M.E., "Low-voltage low-power LVDS drivers," Solid-State Circuits, IEEE Journal of, Volume 40, Issue 2, pp. 472-479, Feb. 2005.
  • 3
    • 85080522919 scopus 로고    scopus 로고
    • IEEE standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI), IEEE Std 1596.3-1996, 31 July 1996.
    • IEEE standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI), IEEE Std 1596.3-1996, 31 July 1996.
  • 4
    • 4344601199 scopus 로고    scopus 로고
    • Mandai, G.; Mandai, P., Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation, Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on, 1, pp. I - 1120-3, May 2004.
    • Mandai, G.; Mandai, P., "Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation," Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on, Volume 1, pp. I - 1120-3, May 2004.
  • 5
    • 11944256972 scopus 로고    scopus 로고
    • Jin-Hyun Kim; Sua Kim; Woo-Seop Kim; Jung-Hwan Choi; Hong-Sun Hwang; Changhyun Kim; Suki Kim, A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling, Solid-State Circuits, IEEE Journal of, 40, Issue 1, pp. 89-101, Jan. 2005.
    • Jin-Hyun Kim; Sua Kim; Woo-Seop Kim; Jung-Hwan Choi; Hong-Sun Hwang; Changhyun Kim; Suki Kim, "A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling," Solid-State Circuits, IEEE Journal of, Volume 40, Issue 1, pp. 89-101, Jan. 2005.
  • 6
    • 2442653849 scopus 로고    scopus 로고
    • A 4Gb/s/pin 4-level simultaneous bidirectional I/O using a 500MHz clock for high-speed memory
    • Digest of Technical Papers. ISSCC, IEEE International, Feb, 2004
    • Jin-Hyun Kim; Sua Kim; Woo-Seop Kim; Jung-Hwan Choi; HongSun Hwang; Changhyun Kim; Suki Kim, "A 4Gb/s/pin 4-level simultaneous bidirectional I/O using a 500MHz clock for high-speed memory," Solid-State Circuits Conference, 2004. Digest of Technical Papers. ISSCC. 2004 IEEE International, Volume 1, pp. 248 - 525, Feb. 2004.
    • (2004) Solid-State Circuits Conference , vol.1 , pp. 248-525
    • Kim, J.1    Kim, S.2    Kim, W.3    Choi, J.4    Hwang, H.5    Kim, C.6    Kim, S.7


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.