Noise optimization of charge amplifiers with MOS input transistors operating in moderate inversion region for short peaking times

IEEE Transactions on Nuclear Science

Volumn 54, Issue 3, 2007, Pages 555-560

  Grybos, P ^a,b   Idzik, M ^b   Maj, P ^b  

^a IEEE   (Poland)

^b AGH UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Poland)

Author keywords

Charge sensitive amplifier; CMOS

Indexed keywords

CHARGE SENSITIVE AMPLIFIER (CSA); NOISE MINIMIZATION; SHORT PEAKING TIMES; TRANSISTOR GATE LENGTH;

COMPUTER SIMULATION; ENERGY DISSIPATION; MOSFET DEVICES; OPTIMIZATION; PARAMETER ESTIMATION; SPURIOUS SIGNAL NOISE;

POWER AMPLIFIERS;

EID: 34250721502     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2007.896342     Document Type: Article

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