Characterization of a flip-flop metastability measurement method

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 54, Issue 5, 2007, Pages 1032-1040

  Cantoni, Antonio ^a   Walker, Jacquelin ^b   Tomlin, Toby Daniel ^a,c  

^a Western Australian Telecommunications Research Institute   (Australia)

^b UNIVERSITY OF LIMERICK   (Ireland)

^c NEC Australia   (Australia)

Author keywords

Circuit reliability; Digital system testing; Flip flops; Metastability; Synchronization

Indexed keywords

CIRCUIT THEORY; ELECTRIC CLOCKS; ELECTRIC VARIABLES MEASUREMENT; JITTER; PERTURBATION TECHNIQUES; SYNCHRONIZATION; TIMING CIRCUITS;

CIRCUIT RELIABILITY; DIGITAL SYSTEM TESTING; METASTABILITY; SAMPLING CLOCK FREQUENCIES;

FLIP FLOP CIRCUITS;

EID: 34248678479     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2007.895514     Document Type: Article

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