Characterizing metastability and jitter in CMOS latch / flip-flop used as a digital mixer

Midwest Symposium on Circuits and Systems

Volumn 3, Issue , 2002, Pages

  Shankar, I ^a   Morris, S A ^a   Hutchens, C G ^a  

^a OKLAHOMA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COUNTING CIRCUITS; ERROR CORRECTION; FLIP FLOP CIRCUITS; JITTER; MIXER CIRCUITS; SILICON ON INSULATOR TECHNOLOGY;

MICROBALANCE COUNTER CIRCUITS (MBC);

CMOS INTEGRATED CIRCUITS;

EID: 0036979338     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. Peregrine Semiconductor Corporation, 6175 Nancy Ridge Drive, San Diego, CA 92121.
2. P. Kartaschoff, Frequency and Time, Academic Press, London; New York, 1978.
3. C.L. Portmann and T. Meng, "Metastability in CMOS Library Elements in Reduced Supply and Technology Scaled Applications", IEEE Journal of Solid-State Circuits, Vol. 30, No. 1, Jan 1995.
4. A. G. Pfister, "Metastability in Digital Circuits with Emphasis on CMOS Technology (asynchronous)." Ph. D. dissertation, Eidgenoessische Technische, Hochschule Zuerich (Switzerland), 1989.
5. C. Dike and E. Burton, "Miller and Noise effects in a Synchronizing Flip-Flop", IEEE Journal of Solid-State Circuits, Vol. 34, No.6, June 1999.
6. J.E. Horstmann, H. W. Eichel and R. L. Coates, "Metastability Behavior of CMOS ASIC Flip-Flops in Theory and Test", IEEE Journal of Solid-State Circuits, Vol. 24, No.1 Feb 1989.
7. D.A. Jones and K. Martin, Analog Integrated Circuit Design, New York: John Wiley & Sons, Inc., 1997.
8. J. Wilstrup, "A method of serial data jitter analysis using one-shot time interval measurements" Wavecrest's Technical Resources web page: www.wavecrest.com/technical/briefs.htm