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Volumn 43, Issue 9, 2007, Pages 516-517

Fabrication and application of MOS-HBT-NDR circuit using standard SiGe process

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC INVERTERS; ELECTRIC RESISTANCE; FREQUENCY MODULATION; MICROFABRICATION; SEMICONDUCTING SILICON COMPOUNDS;

EID: 34247575233     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20070039     Document Type: Article
Times cited : (14)

References (6)
  • 1
    • 0000900676 scopus 로고    scopus 로고
    • Digital circuit applications of resonant tunneling devices
    • Mazumder, P., Kulkarni, S., Bhattachaya, M., Sun, J.P., and Haddad, G.I.: 'Digital circuit applications of resonant tunneling devices', Proc. IEEE, 1998, 86, (4), pp. 664-686
    • (1998) Proc. IEEE , vol.86 , Issue.4 , pp. 664-686
    • Mazumder, P.1    Kulkarni, S.2    Bhattachaya, M.3    Sun, J.P.4    Haddad, G.I.5
  • 2
    • 0028375082 scopus 로고
    • Functions and applications of monostable-bistable transition logic elements (MOBILES) having multiple-input terminals
    • Maezawa, K., Akeyoshi, T., and Mizutani, T.: 'Functions and applications of monostable-bistable transition logic elements (MOBILES) having multiple-input terminals', IEEE. Trans. Electron. Devices, 1994, 41, (2), pp. 148-154
    • (1994) IEEE. Trans. Electron. Devices , vol.41 , Issue.2 , pp. 148-154
    • Maezawa, K.1    Akeyoshi, T.2    Mizutani, T.3
  • 3
    • 0027283293 scopus 로고
    • A new resonant tunneling logic gate employing monostable-bistable transition
    • Maezawa, K., and Mizutani, T.: 'A new resonant tunneling logic gate employing monostable-bistable transition', Jpn. J. Appl. Phys., 1993, 32, pp. L42-L44
    • (1993) Jpn. J. Appl. Phys , vol.32
    • Maezawa, K.1    Mizutani, T.2
  • 4
    • 0035363921 scopus 로고    scopus 로고
    • CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differential-resistance devices
    • Gonzalez, A.F., Bhattacharya, M., Kulkarni, S., and Mazumder, P.: 'CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differential-resistance devices', IEEE J. Solid-State Circuits, 2001, 36, (6), pp. 924-932
    • (2001) IEEE J. Solid-State Circuits , vol.36 , Issue.6 , pp. 924-932
    • Gonzalez, A.F.1    Bhattacharya, M.2    Kulkarni, S.3    Mazumder, P.4
  • 5
    • 33646398921 scopus 로고    scopus 로고
    • Four-valued memory circuit using three-peak MOS-NDR devices and circuits
    • Gan, K.J., Chen, Y.H., Tsai, C.S., and Su, L.X.: 'Four-valued memory circuit using three-peak MOS-NDR devices and circuits', Electron. Lett., 2006, 42, (9), pp. 21-22
    • (2006) Electron. Lett , vol.42 , Issue.9 , pp. 21-22
    • Gan, K.J.1    Chen, Y.H.2    Tsai, C.S.3    Su, L.X.4
  • 6
    • 0018678815 scopus 로고
    • Integrated A-type differential negative resistance MOSFET device
    • Wu, C.Y., and Lai, K.N.: 'Integrated A-type differential negative resistance MOSFET device', IEEE J. Solid-State Circuits, 1979, 14, pp. 1094-1101
    • (1979) IEEE J. Solid-State Circuits , vol.14 , pp. 1094-1101
    • Wu, C.Y.1    Lai, K.N.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.