Study of nanocrystal memory integration in a Flash-like NOR device

Microelectronics Reliability

Volumn 47, Issue 4-5 SPEC. ISS., 2007, Pages 593-597

  Gerardi, Cosimo ^a   Lombardo, Salvatore ^b   Ammendola, Giuseppe ^a   Costa, Giovanni ^a   Ancarani, Valentina ^a   Mello, Domenico ^a   Giuffrida, Stella ^a   Plantamura, Maria Cristina ^a  

^a STMICROELECTRONICS   (Italy)

^b CNR IMM   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FLASH MEMORY; OPTIMIZATION; SILICON; THRESHOLD VOLTAGE; VOLTAGE DISTRIBUTION MEASUREMENT;

ERASE WINDOW SHIFTS; NANOCRYSTAL MEMORY CELLS; NANOCRYSTAL RESIDUALS;

NANOCRYSTALS;

EID: 34247101542     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2007.01.024     Document Type: Article

References (9)

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