Spatial and energetical profiles of defects extracted from ultra-low level trap-assisted leakage current in non-volatile floating thin tunnel oxide memory devices by using direct and floating gate technique measurements

Journal of Non-Crystalline Solids

Volumn 353, Issue 16-17, 2007, Pages 1624-1630

  Burignat, S ^a   Plossu, C ^a   Boivin, P ^b  

^a INSTITUT DES NANOTECHNOLOGIES DE LYON   (France)

^b STMICROELECTRONICS   (France)

Author keywords

Amorphous semiconductors; Conductivity; Defects; Dielectric properties, relaxation, electric modulus; Diffusion and transport; Electrical and electronic properties; Modeling and simulation; Silicon; Structure; Thin film transistors

Indexed keywords

AMORPHOUS SEMICONDUCTORS; COMPUTER SIMULATION; DIELECTRIC PROPERTIES; ELECTRIC CONDUCTIVITY; ELECTRONIC PROPERTIES; MATHEMATICAL MODELS; MEASUREMENT THEORY; RELAXATION PROCESSES; SILICON; THIN FILM TRANSISTORS;

DIFFUSION AND TRANSPORT; ELECTRIC MODULUS; MODELING AND SIMULATION;

LEAKAGE CURRENTS;

EID: 34247098957     PISSN: 00223093     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.jnoncrysol.2007.01.021     Document Type: Article

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