Architectural and technology influence on the optimal total power consumption

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Christian, Schuster ^a   Jean Luc, Nagel ^a   Christian, Piguet ^b   Pierre André, Farine ^a  

^a UNIVERSITY OF NEUCHÂTEL   (Switzerland)

^b CSEM   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POWER TRANSMISSION NETWORKS; ENERGY CONSERVATION; ERROR ANALYSIS; LEAKAGE CURRENTS; NUMERICAL METHODS; THRESHOLD VOLTAGE;

ARCHITECTURE TRANSFORMATIONS; LOW POWER TECHNOLOGY; TOTAL POWER CONSUMPTION EQUATION;

ELECTRIC POWER UTILIZATION;

EID: 34047094456     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.243869     Document Type: Conference Paper

References (7)

1. K. Roy, A. Agarwal, C. H. Kim. Circuit Techniques for Leakage Reduction, chapter 13 of Low-Power Electronics Design, CRC Press, edited by C. Piguet, 2005.
2. A. P. Chandrakasan, R.B. Low Power CMOS Digital Design.IEEEJSSC, 473-484, vol. 27, no.4, April 1992.
3. S. Martin, K.F. Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Lower Power Microprocessors under Dynamic Workloads. ICCAD, 2002
4. K. Nose, T.Sakurai. Optimization of Vdd and Vth for Low-Power and High-Speed Applications.469-474 ASP-DAC, January 2000.
5. C. Schuster, J.-L. Nagel, C. Piguet, P.-A. Farine. Leakage reduction at the architectural level and its application to 16 bit multiplier architectures. Proc. Int'l Workshop on Power and Timing Modeling, Optimization and Simulation, Santorini Island, Greece, September 15-17, 2004.
6. C. Piguet, C. Schuster, J-L. Nagel. Optimizing Architecture Activity and Logic Depth for Static and Dynamic Power Reduction. Proc. of the 2nd Northeast Workshop on Circuits and Systems, NewCAS'04, June 20-23, 2004, Montréal, Canada.
7. C. Schuster, J.-L. Nagel, C. Piguet, P.-A. Farine. An Architecture Design Methodology for Minimal Total Power Consumption at Fixed Vdd and Vth. Journal of Low Power Electronics, Vol.1 No.l, April, 2005.