A 0.8 V, 360 nW Gm-C biquad based on FGMOS transistors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 2156-2159

  Rodriguez Villegas, Esther ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC RANGE; FGMOS TRANSISTORS; FILTER PARAMETER; FLOATING GATE MOS; LOSSLESS; LOW VOLTAGE MICROPOWER; POWER CONSUMPTION;

CUTOFF FREQUENCY;

INTEGRATION;

EID: 33947658011     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465047     Document Type: Conference Paper

References (6)

1. Special Issue on Floating-Gate Devices, Circuits and Systems. IEEE Transactions on Circuits and Systems-II, vol. 48, n°1, Jan. 2001.
2. Jaime Ramírez-Angulo, Ramon Gonzalez-Carvajal, Gladys Omayra Ducoudray, Antonio J. López-Martín and Antonio Torralba, "New Compact CMOS Continuous-Time Low-Voltage Analog Rank-Order Fiter Architecture," IEEE Transactions on Circuits and Sytems-II: Express Briefs, vol.51, no.5, pp.257-261, May 2004
3. B.A. Minch, "Multiple-input translinear element log-domain filters," IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vo.48, no.1, pp.29-36, Jan. 2001.
4. E. Rodriguez-Villegas, A. Yúfera and A. Rueda, "A 1.25 V Micropower Gm-C Filter Based on FGMOS Transistors Operating in Weak Inversion," IEEE Journal of Solid-State Circuits, vol.39, no.1, Jan. 2004.
5. Esther Rodriguez-Villegas, "Low Power and Low Voltage Analog and Digital Design using the FGMOS transistor," Ph.D. thesis. University of Seville, 2002.
6. E. Rodriguez-Villegas and H. Barnes, "Solution to trapped charge in FGMOS transistors," IEE Electronic Letters, vol.39, no.19, September 2003.