Solution to trapped charge in FGMOS transistors

Electronics Letters

Volumn 39, Issue 19, 2003, Pages 1416-1417

  Rodriguez Villegas, E ^a   Barnes, H ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CHARGE; ELECTRIC POTENTIAL; EQUIVALENT CIRCUITS; GATES (TRANSISTOR);

FLOATING GATE; TRAPPED CHARGE;

MOSFET DEVICES;

EID: 0141973749     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20030900     Document Type: Article

References (6)

1. Lai, S.: 'Flash memories: where we were and where we are going'. Proc. IEEE Int. Electron Devices Mtg, San Francisco, CA, USA, 1998, pp. 971-974
2. Rodriguez-Villegas, E., Yufera, A., and Rueda, A.: 'A 1.25 V micropower Gm-C FGMOS filter in weak inversion', IEEE J. Solid-State Circuits (accepted for publication)
3. Rodriguez-Villegas, E.: 'Low voltage and low power analog and digital design with the floating gate MOS transistor (FGMOS)'. PhD Dissertation, University of Seville, Spain, 2002
4. Ramirez-Angulo, J., Carvajal, R.G., Tombs, J., and Torralba, A.: 'Low-voltage CMOS opamp with rail-to-rail input and output signal swing for continuous-time signal processing using multiple-input floating-gate transistors', IEEE Trans. Circuits Syst. II, 2001, 48, pp. 111-116
5. Hasler, P.: 'Foundations of learning in analog VLSI'. PhD Dissertation, California Institute of Technology, Pasadena, CA, USA, 1997
6. Kotani, K., Shibata, T., Imai, M., and Ohmi, T.: 'Clock-controlled neutron-MOS logic gates', IEEE Trans. Circuits Syst. II, 1998, 45, pp. 518-522