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Volumn 51, Issue 5, 2004, Pages 257-261

New Compact CMOS Continuous-Time Low-Voltage Analog Rank-Order Filter Architecture

Author keywords

CMOS analog circuits; low voltage analog circuits; median filter; minimum circuit; rank order filter; transconductance comparator; winner take all circuit

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; LINEAR INTEGRATED CIRCUITS; SIGNAL FILTERING AND PREDICTION; TRANSISTORS;

EID: 2942619066     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2004.827553     Document Type: Article
Times cited : (12)

References (8)
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  • 3
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    • High-speed, accurate analogue CMOS rank filter
    • G. Fikos, S. Vlassis, and S. Siskos, “High-speed, accurate analogue CMOS rank filter,” Electron. Lett., vol. 36, no. 7, pp. 593-594, 2000.
    • (2000) Electron. Lett. , vol.36 , Issue.7 , pp. 593-594
    • Fikos, G.1    Vlassis, S.2    Siskos, S.3
  • 4
    • 0029345369 scopus 로고
    • Direct analog rank filtering
    • July.
    • K. Urahama and T. Nagao, “Direct analog rank filtering,” IEEE Trans. Circuits Syst. I, vol. 42, pp. 385-388, July 1995.
    • (1995) IEEE Trans. Circuits Syst. I , vol.42 , pp. 385-388
    • Urahama, K.1    Nagao, T.2
  • 6
    • 0032692253 scopus 로고    scopus 로고
    • Realization of a programmable rank-order filter architecture using capacitive threshold logic gates
    • Orlando, FL, May 30-June 2.
    • I. Hatirnaz, F.K. Gurkaynak, and Y. Leblebici, “Realization of a programmable rank-order filter architecture using capacitive threshold logic gates,” in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS'99), Orlando, FL, May 30-June 2, 1999, pp. I 435-I 438.
    • (1999) Proc. IEEE Int. Symp. Circuits and Systems (ISCAS'99) , pp. I 435-I 438
    • Hatirnaz, I.1    Gurkaynak, F.K.2    Leblebici, Y.3
  • 7
    • 0034464306 scopus 로고    scopus 로고
    • Rank-order filter using multiple winners-take all
    • 2000, East Lansing, MI, Aug. 8-11.
    • T.L.E. Dake and U. Ciringiroglu, “Rank-order filter using multiple winners-take all,” in Proc. IEEE 43rd Midwest Symp. Circuits and Systems, 2000, vol. 1, East Lansing, MI, Aug. 8-11, 2000, pp. 482-485.
    • (2000) Proc. IEEE 43rd Midwest Symp. Circuits and Systems , vol.1 , pp. 482-485
    • Dake, T.L.E.1    Ciringiroglu, U.2
  • 8
    • 0035245696 scopus 로고    scopus 로고
    • Semiparallel rank-order filtering in analog VLSI
    • Feb.
    • B.P. Tan and D.M. Wilson, “Semiparallel rank-order filtering in analog VLSI,” IEEE Trans. Circuits Syst. II, vol. 48, pp. 198-205, Feb. 2001.
    • (2001) IEEE Trans. Circuits Syst. II , vol.48 , pp. 198-205
    • Tan, B.P.1    Wilson, D.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.